• Title/Summary/Keyword: Multi Direct Gate

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Study on the Design Optimization to Improve Injection Molding Performance of Plastic Regulator Rail (플라스틱 레귤레이터 레일 성형 최적화연구)

  • Lee, Haeng-Soo;Byun, Hong-Seok
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.13 no.12
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    • pp.5709-5715
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    • 2012
  • Injection molding product is commonly used for reducing the weight of automotive vehicle, and door regulator guide rail with plastic material is also made by injection molding process. In order to improve the injection molding performance of plastic regulator guide rail, optimal molding condition is suggested by numerical simulation and DOE after obtaining the sensitivity of parameters for regulator rail manufacturing on warpage and fill time. Furthermore, multi direct gate method and optimal cooling circuit are introduced to get the uniform temperature distribution and better cooling efficiency in molding product. The effect of the proposed design on the injection molding performance is verified by the test of prototype of plastic regulator guide rail.

High-Performance Metal-Substrate Power Module for Electrical Applications

  • Kim, Jongdae;Oh, Jimin;Yang, Yilsuk
    • ETRI Journal
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    • v.38 no.4
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    • pp.645-653
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    • 2016
  • This paper demonstrates the performance of a metal-substrate power module with multiple fabricated chips for a high current electrical application, and evaluates the proposed module using a 1.5-kW sinusoidal brushless direct current (BLDC) motor. Specifically, the power module has a hybrid structure employing a single-layer heat-sink extensible metal board (Al board). A fabricated motor driver IC and trench gate DMOSFET (TDMOSFET) are implemented on the Al board, and the proper heat-sink size was designed under the operating conditions. The fabricated motor driver IC mainly operates as a speed controller under various load conditions, and as a multi-phase gate driver using an N-ch silicon MOSFET high-side drive scheme. A fabricated power TDMOSFET is also included in the fabricated power module for three-phase inverter operation. Using this proposed module, a BLDC motor is operated and evaluated under various pulse load tests, and our module is compared with a commercial MOSFET module in terms of the system efficiency and input current.

Transparent and Flexible All-Organic Multi-Functional Sensing Devices Based on Field-effect Transistor Structure

  • Trung, Tran Quang;Tien, Nguyen Thanh;Seol, Young-Gug;Lee, Nae-Eung
    • Proceedings of the Korean Vacuum Society Conference
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    • 2011.02a
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    • pp.491-491
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    • 2011
  • Transparent and flexible electronic devices that are light-weight, unbreakable, low power consumption, optically transparent, and mechanical flexible possibly have great potential in new applications of digital gadgets. Potential applications include transparent displays, heads-up display, sensor, and artificial skin. Recent reports on transparent and flexible field-effect transistors (tf-FETs) have focused on improving mechanical properties, optical transmittance, and performances. Most of tf-FET devices were fabricated with transparent oxide semiconductors which mechanical flexibility is limited. And, there have been no reports of transparent and flexible all-organic tf-FETs fabricated with organic semiconductor channel, gate dielectric, gate electrode, source/drain electrode, and encapsulation for sensor applications. We present the first demonstration of transparent, flexible all-organic sensor based on multifunctional organic FETs with organic semiconductor channel, gate dielectric, and electrodes having a capability of sensing infrared (IR) radiation and mechanical strain. The key component of our device design is to integrate the poly(vinylidene fluoride-triflouroethylene) (P(VDF-TrFE) co-polymer directly into transparent and flexible OFETs as a multi-functional dielectric layer, which has both piezoelectric and pyroelectric properties. The P(VDF-TrFE) co-polumer gate dielectric has a high sensitivity to the wavelength regime over 800 nm. In particular, wavelength variations of P(VDF-TrFE) molecules coincide with wavelength range of IR radiation from human body (7000 nm ~14000 nm) so that the devices are highly sensitive with IR radiation of human body. Devices were examined by measuring IR light response at different powers. After that, we continued to measure IR response under various bending radius. AC (alternating current) gate biasing method was used to separate the response of direct pyroelectric gate dielectric and other electrical parameters such as mobility, capacitance, and contact resistance. Experiment results demonstrate that the tf-OTFT with high sensitivity to IR radiation can be applied for IR sensors.

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Design of a gate driver driving active balancing circuit for BMSs. (BMS용 능동밸런싱 회로 소자 구동용 게이트 구동 칩 설계)

  • Kim, Younghee;Jin, Hongzhou;Ha, Yoongyu;Ha, Panbong;Baek, Juwon
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.11 no.6
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    • pp.732-741
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    • 2018
  • In order to maximize the usable capacity of a BMS (battery management system) that uses several battery cells connected in series, a cell balancing technique that equips each cell with the same voltage is needed. In the active cell balancing circuit using a multi-winding transformer, a balancing circuit that transfers energy directly to the cell (cell-to-cell) is composed of a PMOS switch and a gate driving chip for driving the NMOS switch. The TLP2748 photocoupler and the TLP2745 photocoupler are required, resulting in increased cost and reduced integration. In this paper, instead of driving PMOS and NMOS switching devices by using photocoupler, we proposed 70V BCD process based PMOS gate driving circuit, NMOS gate driving circuit, PMOS gate driving circuit and NMOS gate driving circuit with improved switching time. ${\Delta}t$ of the PMOS gate drive switch with improved switching time was 8.9 ns and ${\Delta}t$ of the NMOS gate drive switch was 9.9 ns.

Fabrication and characterization of $WSi_2$ nanocrystals memory device with $SiO_2$ / $HfO_2$ / $Al_2O_3$ tunnel layer

  • Lee, Hyo-Jun;Lee, Dong-Uk;Kim, Eun-Kyu;Son, Jung-Woo;Cho, Won-Ju
    • Proceedings of the Korean Vacuum Society Conference
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    • 2011.02a
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    • pp.134-134
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    • 2011
  • High-k dielectric materials such as $HfO_2$, $ZrO_2$ and $Al_2O_3$ increase gate capacitance and reduce gate leakage current in MOSFET structures. This behavior suggests that high-k materials will be promise candidates to substitute as a tunnel barrier. Furthermore, stack structure of low-k and high-k tunnel barrier named variable oxide thickness (VARIOT) is more efficient.[1] In this study, we fabricated the $WSi_2$ nanocrystals nonvolatile memory device with $SiO_2/HfO_2/Al_2O_3$ tunnel layer. The $WSi_2$ nano-floating gate capacitors were fabricated on p-type Si (100) wafers. After wafer cleaning, the phosphorus in-situ doped poly-Si layer with a thickness of 100 nm was deposited on isolated active region to confine source and drain. Then, on the gate region defined by using reactive ion etching, the barrier engineered multi-stack tunnel layers of $SiO_2/HfO_2/Al_2O_3$ (2 nm/1 nm/3 nm) were deposited the gate region on Si substrate by using atomic layer deposition. To fabricate $WSi_2$ nanocrystals, the ultrathin $WSi_2$ film with a thickness of 3-4 nm was deposited on the multi-stack tunnel layer by using direct current magnetron sputtering system [2]. Subsequently, the first post annealing process was carried out at $900^{\circ}C$ for 1 min by using rapid thermal annealing system in nitrogen gas ambient. The 15-nm-thick $SiO_2$ control layer was deposited by using ultra-high vacuum magnetron sputtering. For $SiO_2$ layer density, the second post annealing process was carried out at $900^{\circ}C$ for 30 seconds by using rapid thermal annealing system in nitrogen gas ambient. The aluminum gate electrodes of 200-nm thickness were formed by thermal evaporation. The electrical properties of devices were measured by using a HP 4156A precision semiconductor parameter analyzer with HP 41501A pulse generator, an Agillent 81104A 80MHz pulse/pattern generator and an Agillent E5250A low leakage switch mainframe. We will discuss the electrical properties for application next generation non-volatile memory device.

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Design of a Hub BLDC Motor Driving Systems for the Patrol Vehicles (경계형 차량 구동용 허브 bldc 전동기 구동시스템 설계)

  • Park, Won-seok;Kunn, Young;Lee, Sang-hunn;Choi, Jung-keyng
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2013.10a
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    • pp.612-615
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    • 2013
  • Hub BLDC(Brushless Direct Current) motor, called wheel-in motor is a outer rotor type high efficient direct driving motor which have a multi-pole permanent magnet type rotor as a driving wheel. This study shows a hub BLDC motor speed controller design methode using PIC micro controller to drive 2 wheels or 3 wheels driving body having hub motor driving shaft. The motor driver unit consists of six discrete MOSFET switching devices and the gate driving module is directly designed for high economy.

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A New Quantification Method for Multi-Unit Probabilistic Safety Assessment (다수기 PSA 수행을 위한 새로운 정량화 방법)

  • Park, Seong Kyu;Jung, Woo Sik
    • Journal of the Korean Society of Safety
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    • v.35 no.1
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    • pp.97-106
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    • 2020
  • The objective of this paper is to suggest a new quantification method for multi-unit probabilistic safety assessment (PSA) that removes the overestimation error caused by the existing delete-term approximation (DTA) based quantification method. So far, for the actual plant PSA model quantification, a fault tree with negates have been solved by the DTA method. It is well known that the DTA method induces overestimated core damage frequency (CDF) of nuclear power plant (NPP). If a PSA fault tree has negates and non-rare events, the overestimation in CDF drastically increases. Since multi-unit seismic PSA model has plant level negates and many non-rare events in the fault tree, it should be very carefully quantified in order to avoid CDF overestimation. Multi-unit PSA fault tree has normal gates and negates that represent each NPP status. The NPP status means core damage or non-core damage state of individual NPPs. The non-core damage state of a NPP is modeled in the fault tree by using a negate (a NOT gate). Authors reviewed and compared (1) quantification methods that generate exact or approximate Boolean solutions from a fault tree, (2) DTA method generating approximate Boolean solution by solving negates in a fault tree, and (3) probability calculation methods from the Boolean solutions generated by exact quantification methods or DTA method. Based on the review and comparison, a new intersection removal by probability (IRBP) method is suggested in this study for the multi-unit PSA. If the IRBP method is adopted, multi-unit PSA fault tree can be quantified without the overestimation error that is caused by the direct application of DTA method. That is, the extremely overestimated CDF can be avoided and accurate CDF can be calculated by using the IRBP method. The accuracy of the IRBP method was validated by simple multi-unit PSA models. The necessity of the IRBP method was demonstrated by the actual plant multi-unit seismic PSA models.

Advanced ZigBee Baseband Processor with Variable Data Rates for Internet-of-things Applications

  • Hwang, Hyunsu;Jang, Soohyun;Lee, Seongjoo;Jung, Yunho
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.17 no.1
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    • pp.56-64
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    • 2017
  • In this paper, an advanced ZigBee (AZB) system for internet-of-things (IoT) applications is proposed which can support various data rates from 31.25 Kbps to 2 Mbps, and the implementation results of the AZB baseband processor are presented. Repetition coding for 32-chip direct-sequence spread spectrum (DSSS) symbol is applied for low rates under 250 Kbps to extend the coverage. Convolution coding, puncturing, and interleaving for non-DSSS symbol are performed for high rates from 500 Kbps to 2 Mbps for multi-media services. Simulation results show that the coverage increases at the rate of 51.8-77.3% for various environments compared with IEEE 802.15.4 ZigBee. AZB baseband processor was implemented in 180 nm CMOS process and total gate counts are 260K with the size of $5.8mm^2$.

Reconfigurable Selective Harmonic Elimination Technique for Wide Range Operations in Asymmetric Cascaded Multilevel Inverter

  • Kavitha, R;Rani, Thottungal
    • Journal of Power Electronics
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    • v.18 no.4
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    • pp.1037-1050
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    • 2018
  • This paper presents a novel reconfigurable selective harmonic elimination technique to control harmonics over a wide range of Modulation Indexes (MI) in Multi-Level Inverter (MLI). In the proposed method, the region of the MI is divided into various sectors and expressions are formulated with different switching patterns for each of the sectors. A memetic BBO-MAS (Biogeography Based Optimization - Mesh Adaptive direct Search) optimization algorithm is proposed for solving the Selective Harmonic Elimination - Pulse Width Modulation (SHE-PWM) technique. An experimental prototype is developed using a Field Programmable Gate Array (FPGA) and their FFT spectrums are analyzed over a wide range of MI using a fluke power logger. Simulation and experimental results have validated the performance of the proposed optimization algorithms and the reconfigurable SHE-PWM technique. Further, the sensitivity of the harmonics has been analyzed considering non-integer variations in the magnitude of the input DC sources.