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A Study on Electric Property of BLT thin films as a function of the Post Annealing Time (열처리 시간에 따른 BLT 박막의 전기적 특성에 관한 연구)

  • Kim, Eung-Kwon;Kim, Hyun-Duk;Choi, Jang-Hyun;Kim, Hong-Joo;Song, Joon-Tae
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2002.07b
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    • pp.574-577
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    • 2002
  • In recent year, BLT$(Bi_{3.25}La_{0.75}Ti_3O_{12})$ has been one of promising substitute materials at the ferroelectric random access memory applications. We manufactured $(Bi_{3.25}La_{0.75}Ti_3O_{12})$ Target with a ceramic process. The BLT target was sintered at $1100^{\circ}C$ for 4 hours. Using RF magnetron sputtering, a deposited BLT thin films were estimated about ferroelectric property as a functions of post annealing time. The BLT thin films showed a promoted ferroelectric characteristics at the post annealied sample for 30 minutes. This sample exhibited the (117) preferred crystal orientation, current density of $2{\times}10^{-8}A/cm^2$, a remanent polarization of $10{\mu}C/cm^2$ and a coercive field of 62.1 KV/cm respectively.

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MEMS Probes for Permittivity Measurement (유전율 측정을 위한 MEMS 프로브)

  • Jeong Geun-Seok;Jeong Eum-Min;Kim Jung-Mu;Park Jae-Hyoung;Cho Jei-Won;Cheon Chan-Yul;Kim Yong-Kweon;Kwon Young-Woo
    • 한국정보통신설비학회:학술대회논문집
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    • 2004.08a
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    • pp.226-229
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    • 2004
  • 본 논문은 초고주파 영역에서 개방 단말 동축선을 대신해서 복소 유전율을 측정할 수 있는 MEMS 프로브와 그 응용예로 MEMS 프로브 어레이를 제안한다. MEMS 프로브는 기존의 동축선 프로브와 달리 커넥터와의 연결이 간단하여 일회용으로 프로브를 사용할 수 있다는 점에서 의료용으로 사용할 수 있는 가능성이 있다. 샘플의 유전율 분포를 구하기 위해서 기존의 센서는 반복 접촉을 요구하고 이로 인한 번거로움과 측정 오차를 줄일 목적으로 MEMS 프로브 어레이를 개발 하였다. MEMS 프로브 어레이는 RF 스위치를 사용하여 다수의 측정 포인트를 한번의 센서 접촉으로 측정할 수 있는 새로운 개념의 프로브이다. 1GHz부터 40GHz까지의 광대역에서 0.9% 식염수의 유전율을 측정하여 MEMS 프로브의 성능을 검증하였다.

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Growth characteristics of 4H-SiC homoepitaxial layers grown by thermal CVD (화학기상증착법으로 성장시킨 4H-SiC 동종박막의 성장 특성)

  • Jang, Seong-Joo;Jeong, Moon-Taeg;Seol, Woon-Hag;Park, Ju-Hoon
    • Proceedings of the Korea Association of Crystal Growth Conference
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    • 1999.06a
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    • pp.271-284
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    • 1999
  • As a semiconductor material for electronic devices operated under extreme environmental conditions, silicon carbides (SiCs) have been intensively studied because of their excellent electrical, thermal and other physical properties. The growth characteristics of single-crystalline 4H-SiC homoepitaxial layers grown by a thermal chemical vapor deposition (CVD) were investigated. Especially, the successful growth condition of 4H-SiC homoepitaxial layers using a SiC-uncoated graphite susceptor that utilized Mo-plates was obtained. The CVD growth was performed in an RF-induction heated atmospheric pressure chamber and carried out using off-oriented substrates prepared by a modified Lely method. In order to investigate the crystallinity of grown epilayers, Nomarski optical microscopy, Raman spectroscopy, photoluminescence(PL), scanning electron microscopy (SEM) and other techniques were utilized. The best quality of 4H-SiC homoepitaxial layers was observed in conditions of growth temperature 1500$^{\circ}C$ and C/Si flow ratio 2.0 of C3H3 0.2sccm & SiH4 0.3sccm. The growth rate of epilayers was about 1.0$\mu\textrm{m}$/h in the above growth condition.

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A 3.3V, 68% power added efficieny, GaAs power MESFET for mobile digital hand-held phone (3.3V 동작 68% 효율, 디지털 휴대전화기용 고효율 GaAs MESFET 전력소자 특성)

  • 이종남;김해천;문재경;이재진;박형무
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.32A no.6
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    • pp.41-50
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    • 1995
  • A state-of-the-arts GaAs power metal semiconductor field effect transistor (MESFET) for 3.3V operation digital hand-held phone at 900 MHz has been developed for the first time, The FET was fabricated using a low-high doped structures grown by molecular beam epitaxy (MBE). The fabricated MESFETs with a gate width of 16 mm and a gate length of 0.8 .mu.m shows a saturated drain current (Idss) of 4.2A and a transconductance (Gm) of around 1700mS at a gate bias of -2.1V, corresponding to 10% Idss. The gate-to-drain breakdown voltage is measured to be 28 V. The rf characteristics of the MESFET tested at a drain bias of 3.3 V and a frequencyof 900 MHz are the output power of 32.3 dBm, the power added efficiency of 68%, and the third-ordr intercept point of 49.5 dBm. The power MESFET developed in this work is expected to be useful as a power amplifying device for digital hand-held phone because the high linear gain can deliver a high power added efficiency in the linear operation region of output power and the high third-order intercept point can reduce the third-order inter modulation.

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KOH 이방성 식각을 이용한 Ti-실리사이드 전계방출 소자 연구

  • 김성배;전형탁;최성수
    • Proceedings of the Korean Vacuum Society Conference
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    • 1999.07a
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    • pp.61-61
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    • 1999
  • 저항이 5$\Omega$-cm인 n-type Si(100) 웨이퍼를 실리콘 식각시 마스크로 사용하기 위하여 습식 열산화법을 이용하여 100$0^{\circ}C$에서 SiO2을 2400$\AA$ 성장시킨 후, OPCVD 공정을 통해 785$^{\circ}C$서 SiH2Cl2 가스 30sccm과 NH3가스 100sccm을 이용하여 Si3N4를 3000$\AA$ 증착시켰다. 이 웨이퍼를 포토-리쏘그라피 공정을 거쳐 지름 2$\mu\textrm{m}$의 포토레지스트 패턴을 제작한 후 600W의 RF power하에서 CF4 가스 10sccm, CHF3 가스 15sccm, O2가스 8sccm 및 Ar가스 10sccm을 이용하여 MERIE 방법으로 Si3N4를 식각한 다음, 7:1 BHF 용액내에서 30초간의 습식식각을 통해 40wt.%의 KOH 용액내에 8$0^{\circ}C$에서 30초간의 이방성 식각을 통해 피라미드 모양의 Si FEA(field emitter array)를 제작하였다. 본 실험은 다음과 같이 완성된 Si FEA를 샤프닝 산화 후 산화막 식각을 통해 마스크를 제거한 다음, tip의 열화학적 내구성을 증가시키고 장시간 구동시 안정성과 전계방출 전류밀도를 높이기 위해 tip의 표면에 Ti를 sputter 방법으로 약 300$\AA$ 증착시킨 후, RTA 장비를 이용하여 2단계 열처리 (first annealing:$600^{\circ}C$/30sec, second annealing : 85$0^{\circ}C$/15sec)를 통해 Si FEA의 경우보다 낮은 turn-on 전압과 높은 전계방출 특성을 나타낼 것으로 기대된다.

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Fabrication of Cu-doped PPy electrode for urea sensor (요소측정용 바이오센서를 위한 Cu-doped PPy electrode의 제작)

  • Yang, Jung-Hoon;Jin, Joon-Hyung;Song, Min-Jung;Yoon, Dong-Hwa;Min, Nam-Ki;Hong, Suk-In
    • Proceedings of the KIEE Conference
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    • 2002.07c
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    • pp.2000-2002
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    • 2002
  • 신장병의 조기진단을 위해서 체내의 요소 농도의 정확한 측정은 매우 중요하며, 이러한 이유에서 많은 연구자들은 보다 빠르고 정확한 체내의 요소농도 측정을 위한 바이오센서를 개발 중이다. 본 논문은 반도체 공정을 이용하여 산화막(4.000${\AA}$)이 성장된 p-형 실리콘 웨이퍼를 사용하였다. RF sputter를 사용하여 티타늄과 백금을 증착한 백금 박막전극을 제작하였다. 그 위에 전도성 고분자인 Polypyrrole(PPy)과 전도도를 증가시키기 위하여 구리를 도펀트로 사용 scan rate 40mV/S $0.8{\sim}-0.8V$ 전위영역에서 산화적 전기 중합법 (anodical electropolymerization)을 이용하여 전극을 형성하였다. 요소를 2개의 암모늄 이온과 1개의 탄산 이온으로의 가수분해반응을 촉매하는 효소로써 유레이즈(urease)를 전기적 흡착방법을 이용하여 고정화하고 이에 요소농도의 변화에 대하여 시간대 전류법 (chronoamperometry:CA)을 사용하여 감도를 측정하였다. 최적화된 조건하에서 요소농도에 비례하여 Cu-doped PPy electrode로부터 얻어진 확산한계전류는 $4.5{\mu}A$/decade의 기울기를 나타내었다. 전극의 표면은 SEM(Scanning Electron Microscopy)과 EDX(Energy Dispersive X-Ray Spectrometer)를 이용하여 분석 하였다.

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A Study on BLT Target Preparation and Ferroelectric Property (BLT 타겟제조 및 강유전 박막 특성에 관한 연구)

  • Kim, Eung-Kwon;Park, Gi-Yub;Lee, Kyu-Il;Kang, Hyun-Il;Song, Joon-Tae
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2002.11a
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    • pp.87-90
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    • 2002
  • In recent year, BLT($Bi_{3.25}La_{0.75}Ti_{3}O_{12}$) has been one of promising substitute materials at the ferroelectric random access memory applications. We manufactured $Bi_{3.25}La_{0.75}Ti_3O_{12}$ Target with a ceramic process. The BLT target was sintered at ${1100^{\circ}C}$ for 4 hours. Using RF magnetron sputtering, a deposited BLT thin films were estimated about ferroelectric properly as a functions of post annealing temperatures. The BLT thin films showed a promoted ferroelectric characteristics at the post annealied sample of ${700^{\circ}C}$. This sample exhibited the (117) preferred crystal orientation, current density of $3{\times}10^{-8}A/cm^2$, a remanent polarization of $8{\mu}C/cm^2$ and a coercive field of 42.1 KV/cm respectively.

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Poly-Si Cell with Preferential Grain Boundary Etching and ITO Electrode

  • Lim, D.G.;Lee, S.E.;Park, S.H.;Yi, J.
    • Solar Energy
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    • v.19 no.3
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    • pp.125-131
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    • 1999
  • This paper deals with a novel structure of poly-Si solar cell. A grain boundary(GB) of poly-Si acts as potential barrier and recombination center for photo-generated carriers. To reduce unwanted side effects at the GB of poly-Si, we employed physical GB removal of poly-Si using chemical solutions. Various chemical etchants such as Sirtl, Yang, Secco, and Schimmel were investigated for the preferential GB etching. Etch depth about 10 ${\mu}m$ was achieved by a Schimmel etchant. After a chemical etching of poly-Si, we used $POCl_3$ for emitter junction formation. This paper used an easy method of top electrode formation using a RF sputter grown ITO film. ITO films with thickness of 300 nm showed resistivity of $1.26{\times}10^{-4}{\Omega}-cm$ and overall transmittance above 80%. Using a preferential GB etching and ITO top electrode, we developed a new fabrication procedure of poly-Si solar cells. Employing optimized process conditions, we were able to achieve conversion efficiency as high as 16.6% at an input power of 20 $mW/cm^2$. This paper investigates the effects of process parameters: etching conditions, ITO deposition factors, and emitter doping densities in a poly-Si cell fabrication procedure.

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Comparative study of surface passivation for Metamorphic HEMT using low-k Benzocyclobutene(BCB) (Metamorphic HEMT에서 low-k Benzocyclobutene (BCB)를 이용한 표면 passivation 비교 연구)

  • Baek, Yong-Hyun;Oh, Jung-Hun;Han, Min;Choi, Seok-Gyu;Lee, Bok-Hyung;Lee, Seong-Dae;Lee, Jin-Koo
    • Proceedings of the IEEK Conference
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    • 2006.06a
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    • pp.471-472
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    • 2006
  • The passivation technology is very important, because this technology can protect a device against the influence of ambient environment, and prevent the performance reduction. In this paper, we fabricated the $0.1{\mu}m\;{\Gamma}$-gate InAlAs/InGaAs metamorphic high electron mobility transistors (MHEMTs) on GaAs substrates using the low-k benzocyclobutene (BCB) and $Si_3N_4$ as a passivation and we performed the comparisons of characteristics of the MHEMTs. After passivation, the DC and RF measurement results were decreased either the conventional Si3N4 or BCB layers. The decrement of the BCB passivation was smaller than the $Si_3N_4$ passivation.

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A 2 GHz 20 dBm IIP3 Low-Power CMOS LNA with Modified DS Linearization Technique

  • Rastegar, Habib;Lim, Jae-Hwan;Ryu, Jee-Youl
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.16 no.4
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    • pp.443-450
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    • 2016
  • The linearization technique for low noise amplifier (LNA) has been implemented in standard $0.18-{\mu}m$ BiCMOS process. The MOS-BJT derivative superposition (MBDS) technique exploits a parallel LC tank in the emitter of bipolar transistor to reduce the second-order non-linear coefficient ($g_{m2}$) which limits the enhancement of linearity performance. Two feedback capacitances are used in parallel with the base-collector and gate-drain capacitances to adjust the phase of third-order non-linear coefficients of bipolar and MOS transistors to improve the linearity characteristics. The MBDS technique is also employed cascode configuration to further reduce the second-order nonlinear coefficient. The proposed LNA exhibits gain of 9.3 dB and noise figure (NF) of 2.3 dB at 2 GHz. The excellent IIP3 of 20 dBm and low-power power consumption of 5.14 mW at the power supply of 1 V are achieved. The input return loss ($S_{11}$) and output return loss ($S_{22}$) are kept below - 10 dB and -15 dB, respectively. The reverse isolation ($S_{12}$) is better than -50 dB.