• Transactions of the Korean Society of Mechanical Engineers B
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• v.27 no.7
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• pp.829-836
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• 2003

Understanding of heat generation in semiconductor devices is important in the thermal management of integrated circuits and in the analysis of the device physics. Scanning thermal microscope was used to measure the temperature and the electric potential distribution on the cross-section of an operating metal-oxide-semiconductor field-effect transistor (MOSFET). The temperature distributions were measured both in DC and AC modes in order to take account of the leakage current. The measurement results showed that as the drain bias was increased the hot spot moved to the drain. The density of the iso-potential lines near the drain increased with the increase in the drain bias.

• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.5
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• pp.530-537
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• 2013

An explicit surface potential calculation method of gate-all-around MOSFET (GAAMOSFET) devices which takes into account both interface trap charge and varying doping levels is presented. The results of the method are extensively verified by numerical simulation. Results from the model are used to find qualitative and quantitative effect of interface trap charge on subthreshold slope (SS) of GAAMOSFET devices. Further, design constraints of GAAMOSFET devices with emphasis on the effect of interface trap charge on device SS performance are investigated.

• Journal of IKEEE
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• v.17 no.2
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• pp.129-134
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• 2013

For the conventional power metal-oxide semiconductor field-effect transistor (MOSFET) device structure, there exists a tradeoff relationship between specific on-resistance ($R_{ON.SP}$) and breakdown voltage ($V_{BR}$). In order to overcome the tradeoff relationship, a uniform super-junction (SJ) trench metal-oxide semiconductor field-effect transistor (TMOSFET) structure is studied and designed. The structure modeling considering doping concentrations is performed, and the distributions at breakdown voltages and the electric fields in a SJ TMOSFET are analyzed. The simulations are successfully optimized by the using of the SILVACO TCAD 2D device simulator, Atlas. In this paper, the specific on-resistance of the SJ TMOSFET is successfully obtained 0.96 $m{\Omega}{\cdot}cm^2$, which is of lesser value than the required one of 1.2 $m{\Omega}{\cdot}cm^2$ at the class of 100 V and 100 A for BLDC motor.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.2
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• pp.139-145
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• 2014

Control of threshold voltage ($V_T$) by ground-plane (GP) technique for planar tunnel field-effect transistor (TFET) is studied for the first time using TCAD simulation method. Although GP technique appears to be similarly useful for the TFET as for the metal-oxide-semiconductor field-effect transistor (MOSFET), some unique behaviors such as the small controllability under weak ground doping and dependence on the dopant polarity are also observed. For $V_T$-modulation larger than 100 mV, heavy ground doping over $1{\times}10^{20}cm^{-3}$ or back biasing scheme is preferred in case of TFETs. Polarity dependence is explained with a mechanism similar to the punch-through of MOSFETs. In spite of some minor differences, this result shows that both MOSFETs and TFETs can share common $V_T$-control scheme when these devices are co-integrated.

• Applied Chemistry for Engineering
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• v.24 no.1
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• pp.1-9
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• 2013

As the medical paradigm is changing from disease treatment to disease prevention and an early diagonosis, the demand to develop techniques for the detection of minute concentrations of biomolecules is increasing. Among the various techniques to sense the minute concentration of biomolecules, the biosensors utilizing the matured semiconductor techniques are presented here. To understand such biosensors, the structure and working principle of a MOSFET (Metal-oxide-semiconductor field-effect transistor) which is the basic semiconductor device is firstly introduced, and then the ISFET (Ion sensitive FET), BioFET (Biologically modified FET), Nanowire FET, and IFET (Ionic FET) are introduced, and their applications to biomedical fields are discussed.

• International Journal of Aeronautical and Space Sciences
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• v.11 no.3
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• pp.201-205
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• 2010

DC/DC Switching power converters are commonly used to generate regulated DC output voltages with high-power efficiencies from different DC input sources. A switching converter utilizes one or more energy storage elements such as capacitors, or transformers to efficiently transfer energy from the input to the output at periodic intervals. The fundamental boost converter studied here consists of a power metal-oxide semiconductor field effect transistor switch, an inductor, a capacitor, a diode, and a pulse-width modulation circuit with oscillator, amplifier, and comparator. A buck converter containing a switched-mode power supply is also studied. In this paper, the electrical characteristics of DC/DC power converters are simulated by simulation program with integrated circuit emphasis (SPICE). Furthermore, power efficiency was analyzed based on the specifications of each component.

• Journal of the Semiconductor & Display Technology
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• v.20 no.4
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• pp.1-5
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• 2021

Field-effect transistors based on solution-processed metal oxide semiconductors has attracted huge attention due to their intrinsic characteristics of optical and electrical characteristics with benefits of simple and low-cost process. Especially, spray-pyrolysis has shown excellent device performance which compatible to vacuum-processed Field-effect transistors. However, the high annealing temperature for crystallization of MOS and narrow range of precursors has impeded the progress of the technology. Here, we demonstrated the nc-ZnO/ZnO films performed by spray-pyrolysis with incorporating ZnO nanoparticles into typical ZnO precursor. The films exhibit preserving morphological properties of poly-crystalline ZnO and enhanced electrical characteristics with potential for low-temperature processability. The influence of nanoparticles within the film was also researched for realizing ZnO films providing good quality of performance.

• Proceeding of EDISON Challenge
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• 2014.03a
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• pp.434-438
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• 2014

CMOS의 최종형태로써 Gate-All-Around(GAA) Silicon Nanowire(NW)가 각광받고 있다. 이 논문에서 NW FET(Field Effect Transistor)의 채널 길이와 NW의 폭과 같은 size에 따른 특성변화를 실제 실험 data와 NW FET 특성분석 simulation을 이용해서 비교해보았다. MOSFET(Metal Oxide Semiconductor Field Effect Transistor)의 소형화에 따른 쇼트 채널 효과(short channel effect)에 의한 threshold voltage($V_{th}$), Drain Induced Barrier Lowering(DIBL), subthreshold swing(SS) 또한 비교하였다. 이에 더하여, 기존의 상용툴로 NW를 해석한 시뮬레이션 결과와도 비교해봄으로써 NW의 size scaling에 대한 EDISON NW 해석 simulation의 정확도를 파악해보았다.

• Journal of the Microelectronics and Packaging Society
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• v.30 no.2
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• pp.43-51
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• 2023

In this paper, we introduce the development trends of power devices which is the key component for power conversion system in electric vehicles, and discuss the characteristics of the next-generation wide-bandgap (WBG) power devices. We provide an overview of the characteristics of the present mainstream Si insulated gate bipolar transistor (IGBT) devices and technology roadmap of Si IGBT by different manufacturers. Next, recent progress and advantages of SiC metal-oxide-semiconductor field-effect transistor (MOSFET) which are the most important unipolar devices, is described compared with conventional Si IGBT. Furthermore, due to the limitations of the current GaN power device technology, the issues encountered in applying the power conversion module for electric vehicles were described.

• Transactions on Electrical and Electronic Materials
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• v.11 no.1
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• pp.15-19
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• 2010

In this paper, we discuss design considerations for an n-channel metal-oxide-semiconductor field-effect transistor (MOSFET) with a lateral asymmetric channel (LAC) doping profile. We employed a $0.35\;{\mu}m$ standard complementary MOSFET process for fabrication of the devices. The gates to the LAC doping overlap lengths were 0.5, 1.0, and $1.5\;{\mu}m$. The drain current ($I_{ON}$), transconductance ($g_m$), substrate current ($i_{SUB}$), drain to source leakage current ($i_{OFF}$), and channel-hot-electron (CHE) reliability characteristics were taken into account for optimum device design. The LAC devices with shorter overlap lengths demonstrated improved $I_{ON}$ and $g_m$ characteristics. On the other hand, the LAC devices with longer overlap lengths demonstrated improved CHE degradation and $I_{OFF}$ characteristics.