• The Journal of Korean Institute of Communications and Information Sciences
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• v.36 no.1B
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• pp.86-92
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• 2011

In this paper, we propose a novel hardware MPI(Message Passing Interface) unit which supports message passing in multiprocessor system which use distributed memory architecture. MPI Hardware unit processes data synchronization, transmission and completion, and it supports processor non-blocking operation so it reduces overhead according to synchronization. Additionally, MPI hardware unit combines ready entry, request entry, reserve entry which save and manage the synchronized messages and performs the multiple outstanding issue and out of order completion. According to BFM(Bus Functional Model) simulation result, the performance is increased by 25% on many to many communication. After we designed MPI unit using HDL, with synopsys design compiler we synthesized, and for synthesis library we used MagnaChip $0.18{\mu}m$. And then we making prototype chip. The proposed message transmission interface hardware shows high performance for its increase in size. Thus, as we consider low-cost design and scalability, MPI hardware unit is useful in increasing overall performance of embedded MPSoC(Multi-Processor System-on-Chip).

• Ocean and Polar Research
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• v.23 no.2
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• pp.173-179
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• 2001

Parallel supercomputing is now a must for oceanographic numerical modelers. Most of today's parallel numerical schemes use synchronous algorithms, where some processors that have finished their tasks earlier than others must wait at synchronization points for correct computation. Hence, the load balancing is a crucial factor, however, it is, in general, difficult to achieve on heterogeneous workstation clusters. We devise an asynchronous algorithm that reduces the idle times of faster processors, and discuss application of the algorithm to some grid problems and implementation on a workstation cluster using Message Passing Interface (MPI).

• Journal of the Korea Institute of Military Science and Technology
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• v.18 no.6
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• pp.762-770
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• 2015

Fault tolerance is a crucial design for a mission-critical computer such as engagement control computer that has to maintain its operation for long mission time. In recent years, software fault-tolerant design is becoming important in terms of cost-effectiveness and high-efficiency. In this paper, we propose MPCMCC which is a model-based software component to implement fault tolerance in mission-critical computers. MPCMCC is a fault tolerance design that synchronizes shared data between two computers by using the one-way message-passing scheme which is easy to use and more stable than the shared memory scheme. In addition, MPCMCC can be easily reused for future work by employing the model based development methodology. We verified the functions of the software component and analyzed its performance in the simulation environment by using two mission-critical computers. The results show that MPCMCC is a suitable software component for fault tolerance in mission-critical computers.

• Proceedings of the IEEK Conference
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• 2000.06c
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• pp.121-124
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• 2000

Goal of this Paper is to design and develop core kernel components f3r single processor real-time system, which include real-time schedulers, synchronization mechanism, IPC, message passing, and clock & timer. The goal also contains the basic researches on dynamic load balancing and scheduling which provide mechanism for the distributed information processing and efficient resource sharing among various information appliances based on network.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.18 no.6
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• pp.863-870
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• 1993

A new methodology of multimedia data composition generated SRT(Synchronization Relation Tree) dynamically after user composing multimedia date by using high level user interface, and processes message passing protocols to adjust multimedia data temporal composition. In this paperl we propose SRT generating algorithm which transfer user defined timeline diagram to SRT dynamically. SRT generating algorithm is to use divide and conquer methodology and recurvise programming. And prove that it generates and type of multimedia date compositon to SRT.

• Journal of Korea Society of Industrial Information Systems
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• v.4 no.4
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• pp.88-93
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• 1999

Several Iterative methods are considered, Gram-Schmidt algerian for thin orthogonalization and Lanczos methodfor a few extreme eigenvalues. For these methods, a variants of method is derived for which only one synchronization point per on iteration is required; that is one global communication in a message passing distributed-memory machine per one iteration is required The variant is called restructured method, and restructured method has better parallel properties to the conventional method.

• Proceedings of the Korea Society of Information Technology Applications Conference
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• 2005.11a
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• pp.13-16
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• 2005

It would be desirable to have methods for specific problems, which have low communication costs compared to the computation costs, and in specific applications, algorithms need to be developed and mapped onto parallel computer architectures. Main memory access for shared memory system or global communication in message passing system deteriorate the computation speed. In this paper, it is found that the m-step generalization of the block Lanczos method enhances parallel properties by forming m simultaneous search direction vector blocks. QR factorization, which lowers the speed on parallel computers, is not necessary in the m-step block Lanczos method. The m-step method has the minimized synchronization points, which resulted in the minimized global communications compared to the standard methods.

• The KIPS Transactions:PartA
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• v.11A no.1
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• pp.67-74
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• 2004

Most of today's parallel numerical schemes use synchronous algorithms, where some processors that have finished their tasks earlier than others must wait at synchronization points for correct computation. Hence overall performance of the system is dependent upon the speed of the slowest processor. In this paper, we det·ise a synchronous/asynchronous hybrid algorithm to accelerate convergence of the solution for finding the dominant eigenpair of a large matrix, by reducing the idle times of faster processors using MPMD programming methodology.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.21 no.12
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• pp.2096-2105
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• 1997

A parallel approach using a network of engineering workstations is presented for the efficient computation in the elastoplastic analysis of strip rolling process. The domain decomposition method coupled with the frontal solver for elimination of internal degrees of freedom in each subdomain is used. PVM is used for message passing and synchronization between processors. A 2-D plane strain problem and the strip rolling process are analyzed to demonstrate the performance of the algorithm and factors that have a great effect on efficiency are discussed. In spite of much communication time on the network the result illustrates the advantages of this parallel algorithm over its corresponding sequential algorithm.

• Journal of Korea Society of Industrial Information Systems
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• v.11 no.5
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• pp.163-169
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• 2006

In order to use parallel computers in specific applications, algorithms need to be developed and mapped onto parallel computer architectures. Main memory access for shared memory system or global communication in message passing system deteriorate the computation speed. In this paper, it is found that the m-step generalization of the block Lanczos method enhances parallel properties by forming in simultaneous search direction vector blocks. QR factorization, which lowers the speed on parallel computers, is not necessary in the m-step block Lanczos method. The m-step method has the minimized synchronization points, which resulted in the minimized global communications and main memory access compared to the standard methods.