• The Journal of the Korea institute of electronic communication sciences
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• v.18 no.2
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• pp.321-327
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• 2023

With the development of artificial intelligence, the prediction system has become one of the essential technologies in our lives. Despite the growth of these technologies, traffic congestion at intersections in the 21st century has continued to be a problem. This paper proposes a system that predicts intersection traffic jams using a Convolutional LSTM (Conv-LSTM) algorithm. The proposed system models data obtained by learning traffic information by time zone at the intersection where traffic congestion occurs. Traffic congestion is predicted with traffic volume data recorded over time. Based on the predicted result, the intersection traffic signal is controlled and maintained at a constant traffic volume. Road congestion data was defined using VDS sensors, and each intersection was configured with a Conv-LSTM algorithm-based network system to facilitate traffic.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.21 no.1
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• pp.224-240
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• 1996

It is common sense for at least one or more levels of cache memory to be used in these day's computer systems. In this paper, the impact of the internal cache memory organization on the performance of the computer is investigated by using a simulator program, which is wirtten by authors and run on SUN SPARC workstation, with several real execution, with several real execution trace files. 280 cache organizations have been simulated using n-way set associative mapping and LRU(Least Recently Used) replacement algorithm with write allocation policy. As a result, 16-way setassociative cache is the best configuration, and when we select 256KB cache memory and 64 byte line size, the bus traffic ratio was decreased compared to that of the noncache system so that a single bus could support almost 7 processors without any delay and degradationof high ratio(hit ratio was 99.21%). The smaller the line size we choose, the little lower hit ratio we can get, but the more processors can be supported by a single bus(maximum 18 processors). Therefore, using a proper cache memory organization can make a single bus structure be able to support multiple processors without any performance degradation.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.24 no.8B
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• pp.1401-1411
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• 1999

Due to the increase of multimedia services, multicasting is considered as important design factor for ATM switch. To resolve the traffic expansion problem that is occurred by multicast in multistage interconnection networks, this paper proposes the multicast switch using a high-speed bus and a shared memory switch. Since the proposed switch uses a high-speed time division bus as a connection medium and chooses a shared memory switch as a basic switch module, it provides good port scalability. The traffic arbitration scheme enables internal non-blocking. By simulation we proves a good performance in the data throughput and the cell delay.

• International Journal of Fuzzy Logic and Intelligent Systems
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• v.5 no.4
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• pp.360-366
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• 2005

In the past, when there were few vehicles on the road, the T.O.D.(Time of Day) traffic signal worked very well. The T.O.D. signal operates on a preset signal cycling which cycles on the basis of the average number of average passenger cars in the memory device of an electric signal unit. Now days, with increasing many vehicles on restricted roads, the conventional traffic light creates startup-delay time and end-lag-time. The conventional traffic light loses the function of optimal cycle. And so, $30-45\%$ of conventional traffic cycle is not matched to the present traffic cycle. In this paper we proposes electro sensitive traffic light using fuzzy look up table method which will reduce the average vehicle waiting time and improve average vehicle speed. Computer simulation results prove that reducing the average vehicle waiting time which proposed considering passing vehicle length for optimal traffic cycle is better than fixed signal method which doesn't consider vehicle length.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.34 no.12B
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• pp.1380-1386
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• 2009

In this paper, we propose a CQS(Calendar Queue Scheduler) architecture which was designed for processing multimedia and timing traffic in home network. With various characteristics of the increased traffic flowed in home such as VoIP, VOD, IPTV, and Best-efforts traffic, the needs of managing QoS(Quality of Service) are being discussed. Making a group regarding application or service is effective to guarantee successful QoS under the restricted circumstances. The proposed design is aimed for home gateway corresponding to the end points of receiver on end-to-end QoS and eligible for supporting multimedia traffic within restricted network sources and optimizing queue sizes. Then, we simulated the area for each module and each memory. The area for each module is referenced by NAND($2{\times}1$) Gate(11.09) when synthesizing with Magnachip 0.18 CMOS libraries through the Synopsys Design Compiler. We verified the portion of memory is 85.38% of the entire CQS. And each memory size is extracted through CACTI 5.3(a unit in mm2). According to the increase of the memory’sentry, the increment of memory area gradually increases, and defining the day size for 1 year definitely affects the total CQS area. In this paper, we discussed design methodology and operation for each module when designing CQS by hardware.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.26 no.4
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• pp.633-636
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• 2022

The reduction of energy consumption at the base station (BS) has become more important recently. In this paper, we consider the adaptive muting of the antennas based on the predicted future traffic load to reduce the energy consumption where the number of active antennas is adaptively adjusted according to the predicted future traffic load. Given that traffic load is sequential data, three different RNN structures, namely long-short term memory (LSTM), gated recurrent unit (GRU), and bidirectional LSTM (Bi-LSTM) are considered for the future traffic load prediction. Through the performance evaluation based on the actual traffic load collected from the Afghanistan telecom company, we confirm that the traffic load can be estimated accurately and the overall power consumption can also be reduced significantly using the antenna musing.

• The KIPS Transactions:PartA
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• v.9A no.4
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• pp.547-554
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• 2002

This paper proposes an efficient dynamic routing algorithm for Multistage Bus Networks(MBN's) in distributed shared memory environment. Our algorithm utilizes extra paths available on MBN and determines routing paths adaptively according to switch traffic in order to distribute traffic among switches. Precisely, a packet is transmitted to the next switch on an extra path having a lighter traffic. As a consequence the proposed algorithm reduces the mean response time and the average number of waiting tasks. The results of simulations, carried out with varying numbers of processors and varying switch sizes, show that the proposed algorithm improves the mean response time by 9% and the average number of waiting tasks by 21.6%, compared to the existing routing algorithms which do not consider extra paths on MBN.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.17 no.3
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• pp.896-915
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• 2023

The network function virtualization (NFV) uses virtualization technology to separate software from hardware. One of the most important challenges of NFV is the resource management of virtual network functions (VNFs). According to the dynamic nature of NFV, the resource allocation of VNFs must be changed to adapt to the variations of incoming network traffic. However, the significant delay may be happened because of the reallocation of resources. In order to balance the performance between delay and quality of service, this paper firstly made a compromise between VNF migration and energy consumption. Then, the long short-term memory (LSTM) was utilized to forecast network traffic. Also, the asymmetric loss function for LSTM (LO-LSTM) was proposed to increase the predicted value to a certain extent. Finally, an experiment was conducted to evaluate the performance of LO-LSTM. The results demonstrated that the proposed LO-LSTM can not only reduce migration times, but also make the energy consumption increment within an acceptable range.

• Journal of the Institute of Convergence Signal Processing
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• v.7 no.3
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• pp.136-142
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• 2006

Existing buffer management schemes for shared-memory output queueing switches can be classified into two types: In the first type, some constant amount of memory space is guaranteed to each virtual queue using static queue thresholds. The static threshold method (ST) belongs to this type. On the other hand, the second type of approach tries to maximize the buffer utilization in 머 locating buffer memories. The complete sharing (CS) method is classified into this type. In the case of CS, it is very hard to protect regular traffic from mis-behaving traffic flows while in the case of ST the thresholds can not be adjusted according to varying traffic conditions. In this paper, we propose a new buffer management method called weighted dynamic thresholds (WDT) which can process packet flows based on loss priorities for quality-of-service (QoS) functionalities with fairly high memory utilization factors. We verified the performance of the proposed scheme through computer simulations.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.20 no.1
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• pp.70-85
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• 2021

Deep learning methodology, which has been actively studied in recent years, has improved the performance of artificial intelligence. Accordingly, systems utilizing deep learning have been proposed in various industries. In traffic systems, spatio-temporal graph modeling using GNN was found to be effective in predicting traffic speed. Still, it has a disadvantage that the model is trained inefficiently due to the memory bottleneck. Therefore, in this study, the road network is clustered through the graph clustering algorithm to reduce memory bottlenecks and simultaneously achieve superior performance. In order to verify the proposed method, the similarity of road speed distribution was measured using Jensen-Shannon divergence based on the analysis result of Incheon UTIC data. Then, the road network was clustered by spectrum clustering based on the measured similarity. As a result of the experiments, it was found that when the road network was divided into seven networks, the memory bottleneck was alleviated while recording the best performance compared to the baselines with MAE of 5.52km/h.