• Asia-pacific Journal of Multimedia Services Convergent with Art, Humanities, and Sociology
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• v.9 no.3
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• pp.747-756
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• 2019

Students studying interpretation perform additional study and training in addition to regular class. In simultaneous interpreting and consecutive interpreting, interpreter should memorize speaker's announcement because of different language structure. To improve short-term memory, students perform memory training that requires a pair of students. Therefore, they can not perform self-learning, and therefore, efficiency of studying decreases. To resolve this problem, computer based short-term memory training system has been proposed. Student can perform self-learning by changing words in text to special character in the training system. However, efficiency of studying decreases because computer has low portability. Since the number of words is larger than the number of words to be switched into special character, learning difficulty decreases. To resolve this problem, smart device based short-term memory training system has been proposed. Student can perform smart device based training system without space constraints. Since the proposed training system increases the number of words to be changed into special character, learning difficulty increases. We implemented and evaluated the functionalities of the proposed training system.

• 제어로봇시스템학회:학술대회논문집
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• 1986.10a
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• pp.97-101
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• 1986

This paper deals with the problem of stability and error analyses of the FIR filter and the limited memory filters. It is shown that the FIR filter has the best performance among them, which is demonstrated by some simple examples and via simulations.

• Journal of the military operations research society of Korea
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• v.14 no.1
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• pp.1-17
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• 1988

This paper presents a hardware accelerator for the maze routing problem. This accelerator consists of three 3 stage pipelines. Banked memory is used to avoid memory read/write conflicts and obtain maximum efficiency.

• Journal of the military operations research society of Korea
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• v.13 no.2
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• pp.1-17
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• 1987

This paper presents a hardware accelerator for the maze routing problem. This accelerator consists of three 3 stage pipelines. Banked memory is used to avoid memory read/write conflicts and obtain maximum efficiency.

• Journal of Internet Computing and Services
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• v.17 no.4
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• pp.1-9
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• 2016

Algorithms implementing distributed shared memory (DSM) were developed for ensuring consistency. The performance of DSM algorithms is dependent on system and usage parameters. However, ensuring these algorithms to tolerate faults is a problem that needs to be researched. In this study, we proposed fault-tolerant scheme for DSM system and analyzed reliability and fault-tolerant overhead. Using our analysis, we can choose a proper algorithm for DSM on error prone environment.

• Proceedings of the KIEE Conference
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• 1988.07a
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• pp.247-249
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• 1988

The most space-consuming element of digital image processing system is the video memory. Though this problem is solved by DRAMs, timing constraints posed by video data rates. The cycle time of DRAMs can be diminished by serial transferring and reading or writing pixel datas at the same time. This paper resents the design of 1024${\times}$512 video memory using this technique.

• Journal of the Korean Mathematical Society
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• v.44 no.4
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• pp.1013-1024
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• 2007

In this paper we consider the uniform decay for the wave equation of Carrier model subject to memory condition at the boundary. We prove that if the kernel of the memory decays exponentially or polynomially, then the solutions for the problems have same decay rates.

• Journal of KIISE:Computer Systems and Theory
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• v.34 no.8
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• pp.377-384
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• 2007

With the advance of VLSI technology, the capacity and density of memories is rapidly growing. In this paper, We proposed a reallocation algorithm for faulty memory part to efficient reallocation with row and column redundant memory. Reallocation information obtained from faulty memory by only every test. Time overhead problem occurs geting reallocation information as every test. To its avoid, one test resulted from reallocation information can save to flash memory. In this paper, reallocation information increases efficiency using flash memory.

• IEMEK Journal of Embedded Systems and Applications
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• v.3 no.3
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• pp.158-166
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• 2008

These days, mobile embedded systems adopt flash memory capable of XIP feature since they can reduce memory usage, power consumption, and software load time. XIP provides direct access to ROM and flash memory for processors. However, using XIP incurs unnecessary degradation of applications' performance because direct access to ROM and flash memory shows more delay than that to main memory. In this paper, we propose a memory management framework, dynamic XIP, which can resolve the performance degradation of using XIP. Using a constrained RAM cache, dynamic XIP can dynamically change XIP region according to page access pattern to reduce performance degradation in execution time or energy consumption resulting from native XIP problem. The proposed framework consists of a page profiler gathering applications' memory access pattern using PMU and an XIP manager deciding that a page is accessed whether in main memory or in flash memory. The proposed framework is implemented and evaluated in Linux kernel. Our evaluation shows that our framework can reduce execution time at most 25% and energy consumption at most 22% compared with using XIP-only case adopted in general mobile embedded systems. Moreover, the evaluation shows that in execution time and energy consumption, our modified LRU algorithm with code page filters can reduce more than at most 90% and 80% respectively compared with applying just existing LRU algorithm to dynamic XIP.

• IEMEK Journal of Embedded Systems and Applications
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• v.13 no.5
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• pp.235-243
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• 2018

NAND flash memory has been widely used for embedded systems as storage device and the flash memory file systems such as JFFS2, YAFFS/YAFFS2 have been adopted by these embedded systems. The flash memory file systems provide the high performance and overcome the limitations of flash memory. However, these file systems don't solve the slow mount time problem when a sudden power failure happens. In this paper, we proposed a flash memory management method for enhancing the recovery performance. The proposed method manages the flash memory block type and stores the block type information at recovery image block. When file operations are occurred, our method stores the file information at the metadata block before and after the file operation. When mounting the flash memory, our method only scans the recovery image blocks and metadata blocks. The proposed method reduces the mount time by seeking the metadata block locations fast by using the recovery image blocks. We implemented the proposed method and evaluation results show that our method reduces the mount time 13 ~ 46 % compared with YAFFS2.