• 제목/요약/키워드: Memory Cell

검색결과 841건 처리시간 0.025초

Two-Bit/Cell NFGM Devices for High-Density NOR Flash Memory

  • Lee, Jong-Ho
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제8권1호
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    • pp.11-20
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    • 2008
  • The structure of 2-bit/cell flash memory device was characterized for sub-50 nm non-volatile memory (NVM) technology. The memory cell has spacer-type storage nodes on both sidewalls in a recessed channel region, and is erased (or programmed) by using band-to-band tunneling hot-hole injection (or channel hot-electron injection). It was shown that counter channel doping near the bottom of the recessed channel is very important and can improve the $V_{th}$ margin for 2-bit/cell operation by ${\sim}2.5$ times. By controlling doping profiles of the channel doping and the counter channel doping in the recessed channel region, we could obtain the $V_{th}$ margin more than ${\sim}1.5V$. For a bit-programmed cell, reasonable bit-erasing characteristics were shown with the bias and stress pulse time condition for 2-bit/cell operation. The length effect of the spacer-type storage node is also characterized. Device which has the charge storage length of 40 nm shown better ${\Delta}V_{th}$ and $V_{th}$ margin for 2-bit/cell than those of the device with the length of 84 nm at a fixed recess depth of 100 nm. It was shown that peak of trapped charge density was observed near ${\sim}10nm$ below the source/drain junction.

다중셀 낸드 플래시 메모리의 3셀 CCI 모델과 이를 이용한 에러 정정 알고리듬 (A 3-cell CCI(Cell-to-Cell Interference) model and error correction algorithm for Multi-level cell NAND Flash Memories)

  • 정진호;김시호
    • 대한전자공학회논문지SD
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    • 제48권10호
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    • pp.25-32
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    • 2011
  • MLC NAND flash memory에서 cell간의 기생 커패시턴스 커플링으로 인해 발생하는 CCI에 의한 data error를 개선하기 위한 알고리듬을 제안하였다. 종래의 victim cell 주변 8-cell model보다 에러보정 알고리듬에 적용이 용이한 3-cell model을 제시하였다. 3-cell CCI model의 성능을 입증하기 위해 30nm와 20nm급 공정의 MLC NAND flash memory의 data분포를 분석하여, 주변 cell의 data pattern에 의한 victim cell의 Vth shift관계를 확인하였다. 측정된 Vth분포 data에 MatLab을 이용하여 제안된 알고리듬을 적용하는 경우 BER이 LSB에서는 28.9%, MSB에는 19.8%가 개선되었다.

16레벨셀 낸드 플래시 메모리에서 트렐리스 정답 추정 기법을 이용한 최대 유사도 검출기의 성능 (Performance of the Maximum-Likelihood Detector by Estimation of the Trellis Targets on the Sixteen-Level Cell NAND Flash Memory)

  • 박동혁;이재진
    • 대한전자공학회논문지TC
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    • 제47권7호
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    • pp.1-7
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    • 2010
  • 본 논문에서는 16레벨셀 낸드 플래시 메모리 채널에 최대 유사도 검출 방법을 이용하여 데이터를 검출하기 위해 트렐리스의 정답 값을 추정하는 기법에 대해 연구 하였다. 이 기법은 최대유사도 검출기를 사용할 수 있게 되어 성능향상에 도움을 준다. 플래시 메모리는 커플링 효과 때문에 메모리가 있는 채널 모델링이므로, 이미 알고 있는 데이터 열을 훈련 과정을 통해 트렐리스의 정답 값을 추정하여, 이 값을 토대로 최대 유사도 검출한다. 본 실험을 통해 문턱 전압을 이용한 데이터 검출 방법보다 제안한 기법을 이용한 최대 유사도 검출기의 성능이 좋은 것을 보였다.

플래시메모리를 위한 scaled SONOSFET NVSM 의 프로그래밍 조건과 특성에 관한 연구 (A study on characteristics of the scaled SONOSFET NVSM for Flash memory)

  • 박희정;박승진;홍순혁;남동우;서광열
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2000년도 하계학술대회 논문집
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    • pp.751-754
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    • 2000
  • When charge-trap SONOS cells are used flash memory, the tunneling program/erase condition to minimize the generation of interface traps was investigated. SONOSFET NVSM cells were fabricated using 0.35$\mu\textrm{m}$ standard memory cell embedded logic process including the ONO cell process. based on retrograde twin-well, single-poly, single metal CMOS process. The thickness of ONO triple-dielectric for memory cell is tunnel oxide of 24${\AA}$, nitride of 74 ${\AA}$, blocking oxide of 25 ${\AA}$, respectively. The program mode(Vg: 7,8,9 V, Vs/Vd: -3 V, Vb: floating) and the erase mode(Vg: -4,-5,-6 V, Vs/Vd: floating, Vb: 3V) by modified Fowler-Nordheim(MFN) tunneling were used. The proposed programming condition for the flash memory of SONOSFET NVSM cells showed less degradation($\Delta$Vth, S, Gm) characteristics than channel MFN tunneling operation. Also the program inhibit conditions of unselected cell for separated source lines NOR-tyupe flash memory application were investigated. we demonstrated that the program disturb phenomenon did not occur at source/drain voltage of 1 V∼4 V and gate voltage of 0 V∼4.

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갯무 추출물의 스코폴라민 유도 기억력 저하 모델에서의 뇌신경 보호 효과 (Neuroprotective Effect of Wild Radish Extract on Scopolamine Induced Memory Impairment)

  • 허진영;최상윤;염미정
    • 한국식생활문화학회지
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    • 제36권6호
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    • pp.633-639
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    • 2021
  • Raphanus sativus var. hortensis f. raphanistroides Makino (Korean wild radish [WR]) are root vegetables belonging to the Brassicaceae family. These radish species mostly grow in sea areas in Asia, where they have been traditionally used as a medicinal food to treat various diseases. To investigate the effect of WR on neuronal cell death in SH-SY5Y cells, beta-amyloid was used to develop the cell death model. WR attenuated neuronal cell death in SH-SY5Y and regulated the mitogen-activated protein kinase (MAPK) signaling. WR extract also inhibited acetylcholinesterase inhibitor activity. Additionally, the WR treatment group ameliorated the behavior of the memory-impaired mice in a scopolamine-induced mouse model. In the behavior test, WR treated mice showed shorter escape latency and swimming distance and improved the platform-crossing number and the swimming time within the target quadrant. Furthermore, WR prevented histological loss of neurons in hippocampal CA1 regions induced by scopolamine. This study shows that WR can prevent memory impairment which may be a crucial way for the prevention and treatment of memory dysfunction and neuronal cell death.

기억 세포를 이용한 재고-차량 경로 문제의 인공면역시스템 (An Artificial Immune system using Memory Cell for the Inventory Routing Problem)

  • 양병학
    • 한국경영과학회:학술대회논문집
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    • 한국경영과학회 2008년도 추계학술대회 및 정기총회
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    • pp.236-246
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    • 2008
  • We consider the Inventory Routing problem(IRP) for the vending machine operating system. An artificial immune system(AIS) is introduced to solve the IRP. The IPR is an rolling wave planning. The previous solution of IRP is one of good initial solution of current IRP. We introduce an Artificial Immune system with memory cell (AISM) which store previous solution in memory cell and use an initial solution for current problem. Experiment results shows that AISM reduced calculations time in relatively less demand uncertainty.

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MTJ based MRAM Core Cell

  • Park, Wanjun
    • Journal of Magnetics
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    • 제7권3호
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    • pp.101-105
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    • 2002
  • MRAM (Magnetoresistive Random Access Memory) is a promising candidate for a universal memory that meets all application needs with non-volatile, fast operational speed, and low power consumption. The simplest architecture of MRAM cell is a series of MTJ (Magnetic Tunnel Junction) as a data storage part and MOS transistor as a data selection part. This paper is for testing the actual electrical parameters to adopt MRAM technology in the semiconductor based memory device. The discussed topics are an actual integration of MRAM core cell and its properties such as electrical tuning of MOS/MTJ for data sensing and control of magnetic switching for data writing. It will be also tested that limits of the MRAM technology for a high density memory.

Cytomegalovirus Infection and Memory T Cell Inflation

  • Kim, Jihye;Kim, A-Reum;Shin, Eui-Cheol
    • IMMUNE NETWORK
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    • 제15권4호
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    • pp.186-190
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    • 2015
  • Cytomegalovirus (CMV) infection in healthy individuals is usually asymptomatic and results in latent infection. CMV reactivation occasionally occurs in healthy individuals according to their immune status over time. T cell responses to CMV are restricted to a limited number of immunodominant epitopes, as compared to responses to other chronic or persistent viruses. This response results in progressive, prolonged expansion of CMV-specific $CD8^+$ T cells, termed 'memory inflation'. The expanded CMV-specific $CD8^+$ T cell population is extraordinarily large and is more prominent in the elderly. CMV-specific $CD8^+$ T cells possess rather similar phenotypic and functional features to those of replicative senescent T cells. In this review, we discuss the general features of CMV-specific inflationary memory T cells and the factors involved in memory inflation.

DC 모터 파라메터 변동에 대한 면역 알고리즘 제어기 설계 (Immune Algorithm Controller Design of DC Motor with parameters variation)

  • 박진현;전향식;이민중;김현식;최영규
    • 한국지능시스템학회:학술대회논문집
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    • 한국퍼지및지능시스템학회 2002년도 춘계학술대회 및 임시총회
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    • pp.175-178
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    • 2002
  • The proposed immune algorithm has an uncomplicated structure and memory-cell mechanism as the optimization algorithm which imitates the principle of humoral immune response, and has been used as methods to solve parameter optimization problems. Up to now, the applications of immune algorithm have been optimization problems with non-varying system parameters. Therefore, the effect of memory-cell mechanism, which is a merit of immune algorithm, is without. this paper proposes the immune algorithm using a memory-cell mechanism which can be the application of system with nonlinear varying parameters. To verified performance of the proposed immune algorithm, the speed control of nonlinear DC motor are performed. Computer simulation studies show that the proposed immune algorithm has a fast convergence speed and a good control performances under the varying system parameters.

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Real-Time Digital Image Stabilization for Cell Phone Cameras in Low-Light Environments without Frame Memory

  • Luo, Lin-Bo;Chong, Jong-Wha
    • ETRI Journal
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    • 제34권1호
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    • pp.138-141
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    • 2012
  • This letter proposes a real-time digital image stabilization system for cell phone cameras without the need for frame memory. The system post-processes an image captured with a safe shutter speed using an adaptive denoising filter and a global color correction algorithm. This system can transfer the normal brightness of an image previewed under long exposure to the captured image making it bright and crisp with low noise. It is even possible to take photos in low-light conditions. By not needing frame memory, the approach is feasible for integration into the size-constrained image sensors of cell phone cameras.