• Journal of the Korean Institute of Telematics and Electronics D
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• v.35D no.7
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• pp.32-39
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• 1998

This paper presents the experimental results on the 3-electrode DC-PDP which has a common electrode to improve the PDP life cycle. The measured DC characteristic proves the effectiveness of common electrode absorbing about half of discharge currents. The waveforms for pulse memory operation of3-electrode PDP without crosstalk could also be determined from the I-V characteristics. The pulse memory drives of 8*8 cell array show the frequency response fo memory margin and the luminance efficiency of 3-electrode PDP are quite different from genrally known characteristics of 2-electrode DC-PDP.

• International Journal of Internet, Broadcasting and Communication
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• v.10 no.4
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• pp.6-11
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• 2018

As embedded memory technology evolves, the traditional Static Random Access Memory (SRAM) technology has reached the end of development. For deepening the manufacturing process technology, the next generation memory technology is highly required because of the exponentially increasing leakage current of SRAM. Non-volatile memories such as STT-MRAM (Spin Torque Transfer Magnetic Random Access Memory), PCM (Phase Change Memory) are good candidates for replacing SRAM technology in embedded memory systems. They have many advanced characteristics in the perspective of power consumption, leakage power, size (density) and latency. Nonetheless, nonvolatile memories have two major problems that hinder their use it the next-generation memory. First, the lifetime of the nonvolatile memory cell is limited by the number of write operations. Next, the write operation consumes more latency and power than the same size of the read operation.These disadvantages can be solved using the compiler. The disadvantage of non-volatile memory is in write operations. Therefore, when the compiler decides the layout of the data, it is solved by optimizing the write operation to allocate a lot of data to the SRAM. This study provides insights into how these compiler and architectural designs can be developed.

• JSTS:Journal of Semiconductor Technology and Science
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• v.2 no.3
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• pp.185-196
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• 2002

MRAM(magnetic random access memory) is a promising candidate for a universal memory with non-volatile, fast operation speed and low power consumption. The simplest architecture of MRAM cell is a combination of MTJ(magnetic tunnel junction) as a data storage part and MOS transistor as a data selection part. This article will review the general development status of MRAM and discuss the issues. The key issues of MRAM technology as a future memory candidate are resistance control and low current operation for small enough device size. Switching issues are controllable with a choice of appropriate shape and fine patterning process. The control of fabrication is rather important to realize an actual memory device for MRAM technology.

• Journal of Physiology & Pathology in Korean Medicine
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• v.19 no.1
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• pp.130-138
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• 2005

This experiment was designed to investigate the effect of Phellodendron amurense(PLDA) on the Alzheimer's disease. The effects of PLDA extract on $IL-1{\beta}$, IL-6, amyloid precursor proteins(APP), acetylcholinesterase(AChE), glial fibrillary acidic protein(GFAP) mRNA of PC-12 cell treated by $A{\beta}$ plus $rIL-1{\beta}$ and AChE activity of PC-12 cell lysate treated by $A{\beta}$ plus $rIL-1{\beta}$ and behavior of memory deficit mice induced by scopolamine and mice glucose, uric acid, AChE activity of memory deficit rats induced by scopolamine were investigated, respectively. PLDA extract suppressed $IL-1{\beta}$, IL-6, APP, AChE, GFAP mRNA in PC-12 cell treated by $A{\beta}$ plus $rIL-1{\beta}$ ; AChE activity in cell lysate of PC-12 cell treated by $A{\beta}$ plus $rIL-1{\beta}$. PLDA extract increased glucose, decreased uric acid and AChE significantly in the serum of the memory deficit rats induced by scopolamine. PLDA extract group showed significantly inhibitory effect on the memory deficit of mice induced by scopolamine in the experiment of Morris water maze. According to the above results, it is suggested that PLDA extract might be usefully applied for prevention and treatment of Alzheimer's disease.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.5
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• pp.369-378
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• 2003

This paper presents design and VLSI implementations of a reassembly processor for ATM/AAL. The assembly processor is responsible for processing ATM cells from the receive physical interface. It controls the transfer of the AAL payload to host memory and performs all necessary SAR and CPCS checks. We propose the improved structure of cell identification algorithm and smart scatter method for host memory management. The proposed cell identification algorithm quickly locates the appropriate reassembly VC table based on the received VPI./VCI channel value in the ATM header. The cell identification algorithm also allow complete freedom in assignment of VCI/VPI values. The reassembly processor uses a smart scatter method to write cell payload data to host memory. It maintains the scatter operation and controls the incoming DMA block during scatter DMA to host memory. The proposed reassembly processor can perform reassembly checks on AAL. OAM cell. For an AAL5 connection, only CPCS checks, including the CRC32, are performed. In this paper, we proposed a practical reassembly architecture. The design of reassembly processor has become feasible using 0.6${\mu}{\textrm}{m}$ CMOS gate array technology.

• Journal of Advanced Marine Engineering and Technology
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• v.33 no.1
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• pp.131-137
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• 2009

In this paper, we have manufactured hole type PRAM unit cell using phase change material $Ge_2Sb_2Te_5$. The phase change material $Ge_2Sb_2Te_5$ was deposited on hole of 500 nm size using sputtering method. Reset current of PRAM unit cell was confirmed by measuring R-V characteristic curve. Reset current of manufactured hole type PRAM unit cell is 15 mA, 100 ns. And electro and thermal characteristics of hole type PRAM unit cell were analyzed by 3-D finite element analysis. From simulation temperature of PRAM unit cell was $705^{\circ}C$.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.863-866
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• 2003

Recently, there has been growing interests in the magneto-resistive random access memory (MRAM) because of its great potential as a future nonvolatile memory. In this paper, a CMOS macro-model for MRAM cell based on a twin cell structure is proposed. The READ and WRITE operations of the MTJ cell can be emulated by adopting data latch and switch blocks. The behavior of the circuit is confirmed by HSPICE simulations in a 0.35-${\mu}{\textrm}{m}$ CMOS process. We expect the macro model can be utilized to develope the core architecture and the peripheral circuitry. It can also be used for the characterization and the direction of the real MTJ cells.

• Journal of the Semiconductor & Display Technology
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• v.8 no.1
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• pp.13-17
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• 2009

In PRAM applications, the devices can be made for both binary and multi-state storage. The ability to attain intermediate stages comes either from the fact that some chalcogenide materials can exist in configurations that range from completely amorphous to completely crystalline or from designing device structure such a way that mimics multiple phase chase phenomena in single cell. We have designed stack-structured phase change memory cell which operates as multi-state storage. Amorphous $Ge_xTe_{100-x}$ chalcogenide materials were stacked and a diffusion barrier was chosen for each stack layers. The device is operated by crystallizing each chalcogenide material as sequential manner from the bottom layer to the top layer. The amplitude of current pulse and the duration of pulse width was fixed and number of pulses were controlled to change overall resistance of the phase change memory cell. To optimize operational performance the thickness of each chalcogenide was controlled based on simulation results.

• Korean Journal of Materials Research
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• v.25 no.9
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• pp.429-434
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• 2015

Resistance switching memory cells were fabricated using atomically dispersed Pt-$SiO_2$ thin film prepared via RF co-sputtering. The memory cell can switch between a low-resistance-state and a high-resistance-state reversibly and reproducibly through applying alternate voltage polarities. Percolated conducting paths are the origin of the low-resistance-state, while trapping electrons in the negative U-center in the Pt-$SiO_2$ interface cause the high-resistance-state. Intermediate resistance-states are obtained through controlling the compliance current, which can be applied to multi-level operation for high memory density. It is found that the resistance value is related to the capacitance of the memory cell: a 265-fold increase in resistance induces a 2.68-fold increase in capacitance. The exponential growth model of the conducting paths can explain the quantitative relationship of resistance-capacitance. The model states that the conducting path generated in the early stage requires a larger area than that generated in the last stage, which results in a larger decrease in the capacitance.

• The Korean Journal of Physiology and Pharmacology
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• v.19 no.6
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• pp.515-522
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• 2015

Notch signaling is a key regulator of neuronal fate during embryonic development, but its function in the adult brain is still largely unknown. Mind bomb-2 (Mib2) is an essential positive regulator of the Notch pathway, which acts in the Notch signal-sending cells. Therefore, genetic deletion of Mib2 in the mouse brain might help understand Notch signaling-mediated cell-cell interactions between neurons and their physiological function. Here we show that deletion of Mib2 in the mouse brain results in impaired hippocampal spatial memory and contextual fear memory. Accordingly, we found impaired hippocampal synaptic plasticity in Mib2 knock-out (KO) mice; however, basal synaptic transmission did not change at the Schaffer collateral-CA1 synapses. Using western blot analysis, we found that the level of cleaved Notch1 was lower in Mib2 KO mice than in wild type (WT) littermates after mild foot shock. Taken together, these data suggest that Mib2 plays a critical role in synaptic plasticity and spatial memory through the Notch signaling pathway.