• Title/Summary/Keyword: MEMS stage

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Design of an Electrostatic 2-axis MEMS Stage having Large Area Platform for Probe-based Storage Devices (대면적 플랫폼을 갖는 Probe-based Storage Device(PSD)용 정전형 2축 MEMS 스테이지의 설계)

  • Chung, Il-Jin;Jeon, Jong-Up
    • Transactions of the Korean Society of Machine Tool Engineers
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    • v.15 no.3
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    • pp.82-90
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    • 2006
  • Recently the electrostatic 2-axis MEMS stages have been fabricated for the purpose of an application to PSD (Probe-based Storage Device). However, all of the components(platform, comb electrodes, springs, anchors, etc.) in those stages are placed in-plane so that they have low areal efficienceis, which is undesirable as data storage devices. In this paper, we present a novel structure of an electrostatic 2-axis MEMS stage that is characterized by having large area platform. for obtaining large area efficiency, the actuator part consisting of mainly comb electrodes and springs is placed right below the platform. The structure and operational principle of the MEMS stage are described, followed by a design procedure, structural and modal analyses using FEM(Finite Element Method). The areal efficiency of the MEMS stage was designed to be about 25%, which is very large compared with the conventional ones having a few percentage.

Design of an electrostatic 2-axis MEMS stage with large area platform (대면적 플랫폼을 갖는 정전형 2 축 MEMS 스테이지의 설계)

  • 정일진;전종업;백경록;박규열
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2004.10a
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    • pp.373-378
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    • 2004
  • Recently the electrostatic 2-axis MEMS stages have been fabricated for the purpose of an application to PSD (Probebased Storage Device). However, most of them have low area efficiency, which is undesirable as data storage devices, since all of the components (springs, comb electrodes, anchors, platform, etc.) are placed in-plane. In this paper, we present a novel structure of electrostatic 2-axis MEMS stage that is characterized by having large area platform. For large area efficiency, the actuator part consisting of mainly comb electrodes and springs is placed right below the platform. In this article, the structures and operational principle of the MEMS stages are described, followed by design procedure, structural and modal analysis using FEM(Finite Element Method). The area efficiency of the MEMS stage was designed to be about 55%, that is very large compared with conventional ones having a few percentage.

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Electrostatic 2-axis MEMS Stage with a Large Area Platform for Probe-based Storage Devices (대면적 플랫폼을 갖는 Probe-based Storage Device(PSD)용 정전형 2축 MEMS 스테이지)

  • Chung, Il-Jin;Jeon, Jong-Up
    • Journal of the Korean Society for Precision Engineering
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    • v.23 no.9 s.186
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    • pp.179-189
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    • 2006
  • Recently the electrostatic 2-axis MEMS stages have been fabricated f3r the purpose of an application to PSD (Probe-based Storage Device). However, all of the components (platform, comb electrodes, springs, anchors, etc.) in those stages are placed in-plane so that they have low areal efficiencies such as a few percentage, which is undesirable as data storage devices. In this paper, we present a novel structure of an electrostatic 2-axis MEMS stage that is characterized by having a large areal efficiency of about 25%. For obtaining large area efficiency, the actuator part consisting of mainly comb electrodes and springs is placed right below the platform. The structure and operational principle of the MEMS stage are described, followed by a design and analysis, the fabrication and measurement results. Experimental results show that the driving ranges of the fabricated stage along the x and y axis were 27$\mu$m, 38$\mu$m at the supplied voltages of 65V, 70V, respectively and the natural frequencies along x and y axis were 180Hz, 310Hz, respectively. The total size of the stage is about 5.9$\times$6.8mm$^2$ and the platform size is about 2.7$\times$3.6mm$^2$.

Wafer Level Hermetic Sealing Characteristics of RF-MEMS Devices using Non-Conductive Epoxy (비전도성 에폭시를 사용한 RF-MEMS 소자의 웨이퍼 레벨 밀봉 실장 특성)

  • 박윤권;이덕중;박흥우;송인상;김정우;송기무;이윤희;김철주;주병권
    • Journal of the Microelectronics and Packaging Society
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    • v.8 no.4
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    • pp.11-15
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    • 2001
  • In this paper, hermetic sealing technology was studied for wafer level packaging of the RF-MEMS devices. With the flip-chip bonding method. this non-conductive B-stage epoxy sealing will be profit to the MEMS device sealing. It will be particularly profit to the RF-MEMS device sealing. B-stage epoxy can be cured by 2-step and hermetic sealing can be obtained. After defining 500 $\mu\textrm{m}$-width seal-lines on the glass cap substrate by screen printing, it was pre-baked at $90^{\circ}C$ for about 30 minutes. It was, then, aligned and bonded with device substrate followed by post-baked at $175^{\circ}C$ for about 30 minutes. By using this 2-step baking characteristic, the width and the height of the seal-line could be maintained during the sealing process. The height of the seal-line was controlled within $\pm$0.6 $\mu\textrm{m}$ in the 4 inches wafer and the bonding strength was measured to about 20MPa by pull test. The leak rate, that is sealing characteristic of the B-stage epoxy, was about $10^{-7}$ cc/sec from the leak test.

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Electrostatic 2-axis MEMS Stage for an Application to Probe-based Storage Devices (Probe-based Storage Device(PSD)용 정전형 2축 MEMS 스테이지의 설계 및 제작)

  • Baeck Kyoung-Lock;Jeon Jong Up
    • Journal of the Korean Society for Precision Engineering
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    • v.22 no.11 s.176
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    • pp.173-181
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    • 2005
  • We report on the design and fabrication of an electrostatic 2-axis MEMS stage possessing a platform with a size of $5{times}5mm^2$. The stage, as a key component, would be used in developing probe-based storage devices in the future. It was fabricated by forming numerous $5{\times}5{\mu}m^2$ etching holes in the central platform, as a result, reducing the total number of masks to 1, thereby simplifying the whole fabrication process. Experimental results show that the driving range of the stage was $32{\mu}m$ at the supplied voltage of 20V and the natural frequency was approximately 300Hz. The mechanical coupling between x- and y-motion was also measured and verified to be $25\%$.

Experimental Study on Performance of MEMS(Multi-Effect-Multi-Stage) Distiller for Solar Thermal Desalination (태양열 해수담수화를 위한 증발식 MEMS(Multi-Effect-Multi-Stage)담수기 성능 실험 연구)

  • Joo, Hong-Jin;Jeon, Yong-Han;Kwak, Hee-Youl
    • Journal of the Korean Solar Energy Society
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    • v.33 no.3
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    • pp.91-98
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    • 2013
  • In this study, we have carried out development and performance evaluation of optimized MEMS(Multi-Effect-Multi-Stage) fresh water generator with $7m^2/day$ for solar thermal desalination system. The developed MEMS was composed of high temperature part and low temperature part. This arrangement has the advantage of increasing the availability of solar thermal energy. The MEMS consists of 2 steam generators, 5 evaporators, and 1 condenser. Tubes of heat exchanger used for steam generators, evaporators and condenser were manufactured by corrugated tubes. The performance of the MEMS was tested through in-door experiments, using an electric heater as heat source. The experimental conditions for each parameters were $20^{\circ}C$ for sea water inlet temperature to condenser, $8.16m^2$ /hour sea water inlet volume flow rate, $70^{\circ}C$ for hot water inlet temperature to generator of high temperature part, 3.6 4.8, 6.0 $m^2/hour$ for hot water inlet volume flow rate. As a result, The developed MEMS was required about 85 kW heating source to produce $7m^2/day$ of fresh water. It was analyzed that the performance ratio of MEMS was about 2.6.

비전도성 에폭시를 사용한 RF-MEMS 소자의 웨이퍼 레벨 밀봉 실장 특성

  • 박윤권;이덕중;박흥우;송인상;박정호;김철주;주병권
    • Proceedings of the International Microelectronics And Packaging Society Conference
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    • 2001.11a
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    • pp.129-133
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    • 2001
  • In this paper, hermetic sealing was studied fur wafer level packaging of the MEMS devices. With the flip-chip bonding method, this B-stage epoxy sealing will be profit to MEMS device sealing and further more RF-MEMS device sealing. B-stage epoxy can be cured 2-step and hermetic sealing can be obtained. After defining $500{\mu}{\textrm}{m}$-width seal-lines on the glass cap substrate by screen printing, it was pre-baked at $90^{\circ}C$ for about 30 minutes. It was then aligned and bonded with device substrate followed by post-baked at $175^{\circ}C$ for about 30 minutes. By using this 2-step baking characteristic, the width and the height of the seal-line were maintained during the sealing process. The height of the seal-line was controlled within $\pm0.6${\mu}{\textrm}{m}$ and the strength was measured to about 20MPa by pull test. The leak rate of the epoxy was about $10^7$ cc/sec from the leak test.

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Electromagnetic Micro x-y Stage for Probe-Based Data Storage

  • Park, Jae-joon;Park, Hongsik;Kim, Kyu-Yong;Jeon, Jong-Up
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.1 no.1
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    • pp.84-93
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    • 2001
  • An electromagnetic micro x-y stage for probe-based data storage (PDS) has been fabricated. The x-y stage consists of a silicon body inside which planar copper coils are embedded, a glass substrate bonded to the silicon body, and eight permanent magnets. The dimensions of flexures and copper coils were determined to yield $100{\;}\mu\textrm{m}$ in x and y directions under 50 mA of supplied current and to have 440 Hz of natural frequency. For the application to PDS devices, electromagnetic stage should have flat top surface for the prevention of its interference with multi-probe array, and have coils with low resistance for low power consumption. In order to satisfy these design criteria, conducting planar copper coils have been electroplated within silicon trenches which have high aspect ratio ($5{\;}\mu\textrm{m}$in width and $30{\;}\mu\textrm{m}$in depth). Silicon flexures with a height of $250{\;}\mu\textrm{m}$ were fabricated by using inductively coupled plasma reactive ion etching (ICP-RIE). The characteristics of a fabricated electromagnetic stage were measured by using laser doppler vibrometer (LDV) and dynamic signal analyzer (DSA). The DC gain was $0.16{\;}\mu\textrm{m}/mA$ and the maximum displacement was $42{\;}\mu\textrm{m}$ at a current of 180 mA. The measured natural frequency of the lowest mode was 325 Hz. Compared with the designed values, the lower natural frequency and DC gain of the fabricated device are due to the reverse-tapered ICP-RIE process and the incomplete assembly of the upper-sided permanent magnets for LDV measurements.

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Fabrication Method of 3D Feed Horn Shape MEMS Antenna Array Using MRPBI(Mirror Reflected Parallel Beam Illuminator) with Inclined X-Y-Z Stage (MRPBI를 이용한 3D Feed Horn Shape MEMS Antenna Array의 제조)

  • Park, Jong-Yeon;Kim, Kun-Tae;Moon, Sung;Pak, Jung-Ho;Park, Jong-Oh
    • Proceedings of the KIEE Conference
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    • 2001.07c
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    • pp.1914-1917
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    • 2001
  • 3D Feed Horn Shape MEMS Antenna Array는 적외선 이미지 소자 또는 Tera hertz band 등에서 많은 응용을 할 수 있는 장점을 가진 MEMS 구조체 이다. 하지만 일반적인 MEMS 공정을 이용해서 3D Feed Horn Shape MEMS antenna array를 구현하기는 적합하지 않았다. 본 논문에서는 마스크와 웨이퍼가 일체 된 형태의 경사된 척이 초 저속으로 회전하면서 노광을 할 수 있는 새로운 방식과 미러 반사구조를 이용해서 평행광을 얻을수 있는 노광장치 (MRPBI : Mirror Reflected Parallel Beam Illuminator) System제작방법을 제안하였다. 3D Feed Horn Shape MEMS Antenna의 구조적인 high apect ratio의 특성에 의해서 SU-8과 PMER Negative Photo resist를 이용한 기본적인 실험을 통해 3D 구조체의 구현 가능성을 증명하였다. 또한 Microbolometer의 성능향상을 위한 이론적인 3D MEMS Antenna Model들을 HFSS(High Frequency Structure Simulator)을 이용해서 그 최적구조를 제안하고 3D MEMS Antenna Gain 값을 비교 분석하였다.

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Wafer Level Packaging of RF-MEMS Devices with Vertical Feed-through (수직형 Feed-through 갖는 RF-MEMS 소자의 웨이퍼 레벨 패키징)

  • Park, Yun-Kwon;Lee, Duck-Jung;Park, Heung-Woo;kim, Hoon;Lee, Yun-Hi;Kim, Chul-Ju;Ju, Byeong-Kwon
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.15 no.10
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    • pp.889-895
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    • 2002
  • Wafer level packaging is gain mote momentum as a low cost, high performance solution for RF-MEMS devices. In this work, the flip-chip method was used for the wafer level packaging of RF-MEMS devices on the quartz substrate with low losses. For analyzing the EM (electromagnetic) characteristic of proposed packaging structure, we got the 3D structure simulation using FEM (finite element method). The electric field distribution of CPW and hole feed-through at 3 GHz were concentrated on the hole and the CPW. The reflection loss of the package was totally below 23 dB and the insertion loss that presents the signal transmission characteristic is above 0.06 dB. The 4-inch Pyrex glass was used as a package substrate and it was punched with air-blast with 250${\mu}{\textrm}{m}$ diameter holes. We made the vortical feed-throughs to reduce the electric path length and parasitic parameters. The vias were filled with plating gold. The package substrate was bonded with the silicon substrate with the B-stage epoxy. The loss of the overall package structure was tested with a network analyzer and was within 0.05 dB. This structure can be used for wafer level packaging of not only the RF-MEMS devices but also the MEMS devices.