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Wafer Level Packaging of RF-MEMS Devices with Vertical Feed-through

수직형 Feed-through 갖는 RF-MEMS 소자의 웨이퍼 레벨 패키징

  • 박윤권 (한국과학기술연구원 마이크로시스템센터, 서울시립대학교 전자전기공학부) ;
  • 이덕중 (한국과학기술연구원 마이크로시스템센터) ;
  • 박흥우 (한국전자통신연구원 광통신소자연구부) ;
  • 김훈 (한국과학기술연구원 마이크로시스템센터) ;
  • 이윤희 (한국과학기술연구원 마이크로시스템센터) ;
  • 김철주 (서울시립대학교 전자전기공학부) ;
  • 주병권 (한국과학기술연구원 마이크로시스템센터)
  • Published : 2002.10.01

Abstract

Wafer level packaging is gain mote momentum as a low cost, high performance solution for RF-MEMS devices. In this work, the flip-chip method was used for the wafer level packaging of RF-MEMS devices on the quartz substrate with low losses. For analyzing the EM (electromagnetic) characteristic of proposed packaging structure, we got the 3D structure simulation using FEM (finite element method). The electric field distribution of CPW and hole feed-through at 3 GHz were concentrated on the hole and the CPW. The reflection loss of the package was totally below 23 dB and the insertion loss that presents the signal transmission characteristic is above 0.06 dB. The 4-inch Pyrex glass was used as a package substrate and it was punched with air-blast with 250${\mu}{\textrm}{m}$ diameter holes. We made the vortical feed-throughs to reduce the electric path length and parasitic parameters. The vias were filled with plating gold. The package substrate was bonded with the silicon substrate with the B-stage epoxy. The loss of the overall package structure was tested with a network analyzer and was within 0.05 dB. This structure can be used for wafer level packaging of not only the RF-MEMS devices but also the MEMS devices.

Keywords

References

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