• Clean Technology
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• v.26 no.2
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• pp.137-144
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• 2020

Metal-impregnated activated carbons were prepared via ultrasonic-assisted impregnation method for regeneration and low ammonia concentration. Magnesium and copper were selected as metals, while chloride (Cl^-) and nitrate (NO₃^-) precursors were used to impregnate the surface of activated carbon. The physical and chemical properties of the prepared adsorbents were characterized by TGA, BET, and NH₃-TPD. The ammonia breakthrough test was carried out using a fixed bed and flowing ammonia gas (1000 mg L^-1 NH₃, balanced N₂) at 100 mL min^-1, under conditions of temperature swing adsorption (TSA) and pressure swing adsorption (PSA, 0.3, 0.5, 0.7, 0.9 Mpa). The adsorption and desorption performance of ammonia were in the order of AC-Mg(Cl) > AC-Cu(Cl) > AC-Mg(N) > AC-Cu(N) > AC through NH₃-TPD and TSA and PSA processes. AC-Mg(Cl) using MgCl₂ showed the average adsorption amount of 2.138 mmol/g at TSA process. Also, AC-Mg(Cl) showed the highest initial adsorption amount of 3.848 mmol/g at PSA 0.9 Mpa. When metal impregnated the surface of the activated carbon, it was confirmed that not only physical adsorption, but also chemical adsorption increased, making enhancement in adsorption and desorption performances possible. Also, the prepared adsorbents showed stable adsorption and desorption performances despite repeated processes, confirming their applicability in the TSA and PSA processes.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2013.10a
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• pp.357-360
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• 2013

A 1.8V 2-Gb/s scalable low voltage signaling (SLVS) transmitter (TX) is designed for mobile applications requiring high speed and low power consumption. It consists of 4-lane TX for data transmission, 1-lane TX for a source synchronous clocking, and a 8-phase clock generator. The proposed SLVS TX has the scaling voltage swing from 50 mV to 650 mV and supports a high speed (HS) mode and a low power (LP) mode. An output impedance calibration scheme for the SVLS TX is proposed to improve the signal integrity. The proposed SLVS TX is implemented by using a $0.18-{\mu}m$ 1-poly 6-metal CMOS with a 1.8V supply. The simulated data jitter of the implemented SLVS TX is about 8.04 ps at the data rate of 2-Gbps. The area and power consumption of the 1-lane of the proposed SLVS TX are $422{\times}474{\mu}m^2$ and 5.35 mW/Gb/s, respectively.

• The Journal of the Korea institute of electronic communication sciences
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• v.14 no.6
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• pp.1145-1152
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• 2019

In this paper, a low power current mode 12-bit ADC(: Analog to Digital Converter) is proposed to mix digital circuits and analog circuits with the advantages of low power consumption and high speed operation. The proposed 12 bit ADC is implemented by using 4-bit ADC in a cascade structure, so its power consumption can be reduced, and the chip area can be reduced by using a conversion current mirror circuit. The proposed 12-bit ADC is SK Hynix 350nm process, and post-layout simulation is performed using Cadence MMSIM. It operates at a supply voltage of 3.3V and the area of the proposed circuit is 318㎛ x 514㎛. In addition, the ADC shows the possibility of operating with low power consumption of 3.4mW average power consumption in this paper.

• Journal of the Korean Society of Manufacturing Technology Engineers
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• v.18 no.6
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• pp.642-651
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• 2009

The history of excavator design is not long enough which still causes most of the design considerations to be focused on static analysis or simple functional improvement based on static analysis. However, the real forces experiencing on each component of excavator are highly transient and impulsive. Therefore, the prediction and the evaluation of the movement of the excavator by dynamic load in the early design stage through the dynamic transient analysis of the excavator and ensuring of design technique plays an importance role to reduce development-cost, shorten product-deliver, decrease vehicle-weight and optimize the system design. In this paper, Commercial software DADS and ANSYS help to develop the track model of the crawler type excavator, and to evaluate the performance and the dynamic characteristics of excavator with various simulations. For that reason, the track of crawler type excavator is modelled with DADS Track Vehicle Superelement, and the reaction forces on the track rollers were predicted through the driving simulation. Also, the upper frame and cabin vibration characteristics, at the low RPM idle state, were evaluated with engine rigid body modelling. And flexibility body effects were considered to determine the more accurate joint reaction forces and accelerations under the upper frame swing motion.

• Transactions of the Korean hydrogen and new energy society
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• v.27 no.2
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• pp.135-143
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• 2016

Biogas is a renewable fuel from anaerobic digestion of organic matters such as sewage sludge, manure and food waste. Raw biogas consists mainly of methane, carbon dioxide, hydrogen sulfide, and water. Biogas may also contain other impurities such as siloxanes, halogenated hydrocarbons, aromatic hydrocarbons. Efficient power technologies such as fuel cell demand ultra-low concentration of containments in the biogas feed, imposing stringent requirements on fuel purification technology. Biogas is upgraded from pressure swing adsorption after biogas purification process which consists of water, $H_2S$ and siloxane removal. A polymer electrolyte membrane fuel cell power plant is designed to operate on reformate produced from upgraded biogas by steam reformer.

• Journal of the Institute of Electronics and Information Engineers
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• v.49 no.9
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• pp.244-250
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• 2012

This paper describes a 4-Gb/s receiver circuit for a low-swing ground-referenced differential signaling system. The receiver employs a common-gate level-shifter and a continuous linear equalizer which compensates inter-symbol-interference (ISI) and improves voltage and timing margins. A bias circuit maintains the bias current of the level-shifter when the common level of the input signal changes. The receiver is implemented with a low-power 65-nm CMOS technology. When 4-Gb/s 400mVp-p signals are transmitted to the receiver through the channel with the attenuation of -19.7dB, the timing margin based on bit error rate (BER) of $10^{-11}$ is 0.48UI and the power consumption is as low as 0.30mW/Gb/s.

• JSTS:Journal of Semiconductor Technology and Science
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• v.6 no.1
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• pp.52-58
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• 2006

Single-electron transistor (SET)-based logic cells and SET/FET hybrid integrated circuits have been fabricated on SOI chips. The input-output voltage transfer characteristic of the SET-based complementary logic cell shows an inverting behavior where the output voltage gain is estimated to be about 1.2 at 4.2K. The SET/FET output driver, consisting of one SET and three FETs, yields a high voltage gain of 13 and power amplification with a wide-range output window for driving next circuit. Finally, the SET/FET literal gate for a multi-valued logic cell, comprising of an SET, an FET and a constant-current load, displays a periodic voltage output of high/low level multiple switching with a swing as high as 200mV. The multiple switching functionality of all the fabricated logic circuits could be enhanced by utilizing a side gate incorporated to each SET component to enable the phase control of Coulomb oscillations, which is one of the unique characteristics of the SET-based logic circuits.

• ETRI Journal
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• v.37 no.6
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• pp.1135-1142
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• 2015

Multilayered ZnO-$SnO_2$ heterostructure thin films consisting of ZnO and $SnO_2$ layers are produced by alternating the pulsed laser ablation of ZnO and $SnO_2$ targets, and their structural and field-effect electronic transport properties are investigated as a function of the thickness of the ZnO and $SnO_2$ layers. The performance parameters of amorphous multilayered ZnO-$SnO_2$ heterostructure thin-film transistors (TFTs) are highly dependent on the thickness of the ZnO and $SnO_2$ layers. A highest electron mobility of $43cm^2/V{\cdot}s$, a low subthreshold swing of a 0.22 V/dec, a threshold voltage of 1 V, and a high drain current on-to-off ratio of $10^{10}$ are obtained for the amorphous multilayered ZnO(1.5nm)-$SnO_2$(1.5 nm) heterostructure TFTs, which is adequate for the operation of next-generation microelectronic devices. These results are presumed to be due to the unique electronic structure of amorphous multilayered ZnO-$SnO_2$ heterostructure film consisting of ZnO, $SnO_2$, and ZnO-$SnO_2$ interface layers.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.2
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• pp.172-178
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• 2016

In this paper, we propose a sub-10 nm Ge/GaAs heterojunction-based tunneling field-effect transistor (TFET) with vertical band-to-band tunneling (BBT) operation for ultra-low-power (LP) applications. We design a stack structure that is based on the Ge/GaAs heterojunction to realize the vertical BBT operation. The use of vertical BBT operations in devices results in excellent subthreshold characteristics with a reduction in the drain-induced barrier thinning (DIBT) phenomenon. The proposed device with a channel length ($L_{ch}$) of 5 nm exhibits outstanding LP performance with a subthreshold swing (S) of 29.1 mV/dec and an off-state current ($I_{off}$) of $1.12{\times}10^{-11}A/{\mu}m$. In addition, the use of the highk spacer dielectric $HfO_2$ improves the on-state current ($I_{on}$) with an intrinsic delay time (${\tau}$) because of a higher fringing field. We demonstrate a sub-10 nm LP switching device that realizes a good S and lower $I_{off}$ at a lower supply voltage ($V_{DD}$) of 0.2 V.

• Journal of Electrical Engineering and Technology
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• v.9 no.5
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• pp.1654-1659
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• 2014

Tunneling field-effect transistors (TFETs) are very applicable to low standby-power application by their virtues of low off-current ($I_{off}$) and small subthreshold swing (S). However, low on-current ($I_{on}$) of silicon-based TFETs has been pointed out as a drawback. To improve $I_{on}$ of TFET, a gate-all-around (GAA) TFET based on III-V compound semiconductor with InAs/InGaAs/InP multiple-heterojunction structure is proposed and investigated. Its performances have been evaluated with the gallium (Ga) composition (x) for $In_{1-x}Ga_xAs$ in the channel region. According to the simulation results for $I_{on}$, $I_{off}$, S, and on/off current ratio ($I_{on}/I_{off}$), the device adopting $In_{0.53}Ga_{0.47}As$ channel showed the optimum direct-current (DC) performance, as a result of controlling the Ga fraction. By introducing an n-type InGaAs thin layer near the source end, improved DC characteristics and radio-frequency (RF) performances were obtained due to boosted band-to-band (BTB) tunneling efficiency.