• Title/Summary/Keyword: Low-Code

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Design and Implementation of a Low-Code/No-Code System

  • Hyun, Chang Young
    • International journal of advanced smart convergence
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    • v.8 no.4
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    • pp.188-193
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    • 2019
  • This paper is about environment-based low-code and no-code execution platform and execution method that combines hybrid and native apps. In detail, this paper describes the Low-Code/No-Code execution structure that combines the advantages of hybrid and native apps. It supports the iPhone and Android phones simultaneously, supports various templates, and avoids developer-oriented development methods based on the production process of coding-free apps and the produced apps play the role of Java virtual machine (VM). The Low-Code /No-Code (LCNC) development platform is a visual integrated development environment that allows non-technical developers to drag and drop application components to develop mobile or web applications. It provides the functions to manage dependencies that are packaged into small modules such as widgets and dynamically loads when needed, to apply model-view-controller (MVC) pattern, and to handle document object model (DOM). In the Low-Code/No-Code system, the widget calls the AppOS API provided by the UCMS platform to deliver the necessary requests to AppOS. The AppOS API provides authentication/authorization, online to offline (O2O), commerce, messaging, social publishing, and vision. It includes providing the functionality of vision.

Design of Low-Density Parity-Check Codes for Multiple-Input Multiple-Output Systems (Multiple-Input Multiple-output system을 위한 Low-Density Parity-Check codes 설계)

  • Shin, Jeong-Hwan;Chae, Hyun-Do;Han, In-Duk;Heo, Jun
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.35 no.7C
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    • pp.587-593
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    • 2010
  • In this paper we design an irregular low-density parity-check (LDPC) code for multiple-input multiple-output (MIMO) system, using a simple extrinsic information transfer (EXIT) chart method. The MIMO systems considered are optimal maximum a posteriori probability (MAP) detector. The MIMO detector and the LDPC decoder exchange soft information and form a turbo iterative receiver. The EXIT charts are used to obtain the edge degree distribution of the irregular LDPC code which is optimized for the MIMO detector. It is shown that the performance of the designed LDPC code is better than that of conventional LDPC code which was optimized for either the Additive White Gaussian Noise (AWGN) channel or the MIMO channel.

Low Latency Algorithms for Iterative Codes

  • Choi, Seok-Soon;Jung, Ji-Won;Bae, Jong-Tae;Kim, Min-Hyuk;Choi, Eun-A
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.32 no.3C
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    • pp.205-215
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    • 2007
  • This paper presents low latency and/or computation algorithms of iterative codes of turbo codes, turbo product codes and low density parity check codes for use in wireless broadband communication systems. Due to high coding complexity of iterative codes, this paper focus on lower complexity and/or latency algorithms that are easily implementable in hardware and further accelerate the decoding speed.

Design of Low Power Error Correcting Code Using Various Genetic Operators (다양한 유전 연산자를 이용한 저전력 오류 정정 코드 설계)

  • Lee, Hee-Sung;Hong, Sung-Jun;An, Sung-Je;Kim, Eun-Tai
    • Journal of the Korean Institute of Intelligent Systems
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    • v.19 no.2
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    • pp.180-184
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    • 2009
  • The memory is very sensitive to the soft error because the integration of the memory increases under low power environment. Error correcting codes (ECCs) are commonly used to protect against the soft errors. This paper proposes a new genetic ECC design method which reduces power consumption. Power is minimized using the degrees of freedom in selecting the parity check matrix of the ECCs. Therefore, the genetic algorithm which has the novel genetic operators tailored for this formulation is employed to solve the non-linear power optimization problem. Experiments are performed with Hamming code and Hsiao code to illustrate the performance of the proposed method.

An Improved Decoding Scheme of LCPC Codes (LCPC 부호의 개선된 복호 방식)

  • Cheong, Ho-Young
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.11 no.4
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    • pp.430-435
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    • 2018
  • In this paper, an improved decoding scheme for low-complexity parity-check(LCPC) code with small code length is proposed. The LCPC code is less complex than the turbo code or low density parity check(LDPC) code and requires less memory, making it suitable for communication between internet-of-things(IoT) devices. The IoT devices are required to have low complexity due to limited energy and have a low end-to-end delay time. In addition, since the packet length to be transmitted is small and the signal processing capability of the IoT terminal is small, the LCPC coding system should be as simple as possible. The LCPC code can correct all single errors and correct some of the two errors. In this paper, the proposed decoding scheme improves the bit error rate(BER) performance without increasing the complexity by correcting both errors using the soft value of the modulator output stage. As a result of the simulation using the proposed decoding scheme, the code gain of about 1.1 [dB] was obtained at the bit error rate of $10^{-5}$ compared with the existing decoding method.

Designing A Concatenated Code To Improve The Error Performance Of Low-Priority Data In T-DMB System With The Hierarchical Modulation

  • Li, Erke;Kim, Sung-Gaun;Kim, Han-Jong
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2008.05a
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    • pp.689-692
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    • 2008
  • Hierarchical modulation has been considered for achieving higher data rates in Terrestrial-DMB(T-DMB) systems. And for achieving a higher data rates transmission, the low-priority (LP) data, which is used to carry additional data, such as video data, audio data and textual data, should be perfectly decoded in a certain value of $E_b/N_o$. Unfortunately, the man-made noise badly affects the high-priority (HP) symbol, which is used to carry the conventional data in the existed T-DMB system; and since the advanced T-DMB system is proposed to fit for the legacy T-DMB receivers, the low-priority symbols in the hierarchical modulation are much worse affected by the neighbors, who are both in the same quadrant. Because of the feature that mentioned previously, the turbo code has been considered to deal with the LP data. And due to the degradation which caused by the shortened symbol distance, the error performance of LP data is not sufficient by only using the turbo code. In this paper, we propose a Reed-Solomon code used outside of turbo code, and with the turbo code, it becomes a concatenated code. In this paper, there are some simulation results, within the comparison of those performances, we can see how a Reed-Solomon code is utilized for degradation of error performance which is caused by the hierarchical constellation, and how to design a Reed-Solomon code which is suitable for improving the degradation of error performance.

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On-Demand Remote Software Code Execution Unit Using On-Chip Flash Memory Cloudification for IoT Environment Acceleration

  • Lee, Dongkyu;Seok, Moon Gi;Park, Daejin
    • Journal of Information Processing Systems
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    • v.17 no.1
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    • pp.191-202
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    • 2021
  • In an Internet of Things (IoT)-configured system, each device executes on-chip software. Recent IoT devices require fast execution time of complex services, such as analyzing a large amount of data, while maintaining low-power computation. As service complexity increases, the service requires high-performance computing and more space for embedded space. However, the low performance of IoT edge devices and their small memory size can hinder the complex and diverse operations of IoT services. In this paper, we propose a remote on-demand software code execution unit using the cloudification of on-chip code memory to accelerate the program execution of an IoT edge device with a low-performance processor. We propose a simulation approach to distribute remote code executed on the server side and on the edge side according to the program's computational and communicational needs. Our on-demand remote code execution unit simulation platform, which includes an instruction set simulator based on 16-bit ARM Thumb instruction set architecture, successfully emulates the architectural behavior of on-chip flash memory, enabling embedded devices to accelerate and execute software using remote execution code in the IoT environment.

A Minimum-Bandwidth Line Code for Low-Pass Channels (저역 통과 선로를 위한 최소 대역폭 선로부로)

  • 김대영;김재균
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.20 no.5
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    • pp.23-30
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    • 1983
  • A new runlength-limited minimum-bandwidth line code is designed by modifying the duobinary code. Since the new code is runlength limited, the need for a data scrambling before transmission is eliminated. The eye width and the error probability of the new code are shown to be almost the same as those of the duobinary code. Also, the power spectral shape is scarcely changed, so that the new code is suitable for such low-pass channels as optical fibers.

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Analysis a LDPC code in the VDSL system (VDSL 시스템에서의 LDPC 코드 연구)

  • Joh, Kyung-Hyun;Kang, Hee-Hoon;Yi, Sang-Hoi;Na, Kuk-Hwan
    • Proceedings of the IEEK Conference
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    • 2006.06a
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    • pp.999-1000
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    • 2006
  • The LDPC Code is focusing a powerful FEC(Forward Error Correction) codes for 4G Mobile Communication system. LDPC codes are used minimizing channel errors by modeling AWGN Channel as VDSL system. The performance of LDPC code is better than that of turbo code in long code word on iterative decoding algorithm. LDPC code are encoded by sparse parity check matrix. there are decoding algorithms for a LDPC code, Bit Flipping, Message passing, Sum-Product. Because LDPC Codes use low density parity bit, mathematical complexity is low and relating processing time becomes shorten.

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LDPC Code Design and Performance Analysis for Distributed Video Coding System (분산 동영상 부호화 시스템을 위한 LDPC 부호 설계 및 성능 평가)

  • Noh, Hyeun-Woo;Lee, Chang-Woo
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.37 no.1A
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    • pp.34-42
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    • 2012
  • Low density parity check (LDPC) code is widely used, since it shows superior performance close to Shannon limit and its decoding complexity is lower than turbo code. Recently, it is used as a channel code to decode Wyner-Ziv frames in distributed video coding (DVC) system. In this paper, we propose an efficient method to design the parity check matrix H of LDPC codes. In order to apply LDPC code to DVC system, the LDPC code should have rate compatibility. Thus, we also propose a method to merge check nodes of LDPC code to attain the rate compatibility. LDPC code is designed using ACE algorithm and check nodes are merged for a given code rate to maximize the error correction capability. The performance of the designed LDPC code is analyzed extensively by computer simulations.