• 제목/요약/키워드: Low power operation

검색결과 1,992건 처리시간 0.026초

Zero Voltage Switching Boost H-Bridge AC Power Converter for Induction Heating Cooker

  • Kwon, Soon-Kurl;Saha, Bishwajit
    • 조명전기설비학회논문지
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    • 제21권4호
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    • pp.19-27
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    • 2007
  • This paper presents a novel soft-switching PWM utility frequency AC to high frequency AC power conversion circuit incorporating boost H-bridge inverter topology, which is more suitable and acceptable for cost effective consumer induction heating applications. The operating principle and the operation modes are presented using the switch mode equivalent circuits and the operating voltage and current waveforms. The performances of this high-frequency inverter using the latest IGBTs are illustrated, which includes high frequency power regulation and actual efficiency characteristics based on zero voltage soft-switching(ZVS) operation ranges, and the power dissipation as compared with those of the conventional type high frequency inverter. In addition, a dual mode control scheme of this high frequency inverter based on asymmetrical pulse width modulation(PWM) and pulse density modulation(PDM) control scheme is discussed in this paper in order to extend the soft switching operation ranges and to improve the power conversion efficiency at the low power settings. The power converter practical effectiveness is substantially proved based on experimental results from practical design example.

시화조력발전 연계에 의한 남시화 계통의 최적 운영 방안 (Optimal Operation by integrating Sihwa Power into NamSihwa Systems)

  • 김규호;송경빈
    • 조명전기설비학회논문지
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    • 제23권5호
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    • pp.120-126
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    • 2009
  • 본 연구에서는 시화조력발전소의 계통 연계에 따른 남시화 계통의 최적 운영 방안을 제안하였다. 남시화 계통의 최적 운영을 위하여 1분 단위의 시화호 해측의 수위를 예측하였으며, 예측된 시화방조제의 해측과 내측의 수위를 이용하여 시화조력발전소의 시간대별 발전량을 계산하였다. 특히, 남시화 계통에서 구입하는 전력은 시화조력의 계산된 시간대별 발전량을 이용하여 송전계통에서 전체 전력을 구입하는 방안, 조력발전이 가능한 시간대에 생산되는 모든 전력을 구입하는 방안 그리고 송전계통과 조력발전으로부터 전력구입 비용을 비교하여 구입하는 방안을 마련함으로써 부존자원이 부족한 우리나라에서 에너지 절약에 기여할 수 있는 최적의 운영 방안을 제시하였다.

초전도전력설비의 구성 및 운전 (Operation and Configurgation of Superconducting Machines and Devices in Utility System)

  • 홍원표;이원규;곽희로
    • 한국조명전기설비학회:학술대회논문집
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    • 한국조명전기설비학회 1996년도 추계학술발표회논문집
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    • pp.116-121
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    • 1996
  • An image of future power system which has introduced superconducting generator, cable, transformer, fault current limiter, SMES and so on is presented. Conceptual designs of each SC machines and devices are carried out. The SC cable and SFCL utilize the high Tc superconductor(HTS) cooled by liquid $N_2$Other devices use low temperature superconducting cooled by He. The SC power system models are proposed detailedly. In viewpoint of the operation and control SC power system, The concrete design direction and effective role of each SC apparatus are investigated. In this paper, it is pointed that superconducting fault limiters(SFCLs) should play an important part of the quenching current level coordination to prevent the other SC devices from quenching. Finially, SFCL are also expected to he very effective to introduce flexibility of power system configuration and operation due to their possibility to enhance transient stability and reduce short circuit current.

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연료전지발전용 부스터의 출력전압제어 연구 (Control of Booster Output Voltage in Fuel Cell Power Plant)

  • 한수빈;정봉만;신동열;최수현
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1992년도 하계학술대회 논문집 B
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    • pp.1038-1040
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    • 1992
  • Booster is used widely as one of the step-up DC/DC power converter in power conversion process for fuel cell power plant which have the electrical characteristic of the high current density and low cell voltage. In view of control system, booster can be unstable when it is operated in broad operation range because the transfer function of booster has zero in right half plane of s-domain. So for reliable operation, controller must make the system stable in whole working range. In this paper, the two control method such as digital PID control and fuzzy control is studied for booster output voltage regulation in fuel cell plant. The design procedure of PID control and fuzzy control is described. And the experiment of designed controller action is performed in various operation points for controller performance test.

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무동력 자동 수문 개발 (Development of Self-controlled gate)

  • 정광근;천만복
    • 한국농공학회:학술대회논문집
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    • 한국농공학회 2002년도 학술발표회 발표논문집
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    • pp.57-60
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    • 2002
  • Developed power off automatic stanch that keep floodgate upper stream water level changelessly for curtailment of operation by manpower and electricity lead-in equal early investment expense that manual system floodgate and electric motion floodgate have. Human strength does not need in floodgate operation as that power off automatic floodgate open and close floodgate automatically by buoyancy and also, another thing power does not need. Before establish floodgate, effect that get to waterway when behaves repair calculation of correct waterway and decide size of floodgate accordingly and establish floodgate must do examination analysis fussily. power off automatic floodgate night soil that get between countermeasure is the urgentest low-down in reply because can do mistake in operation by phenomenon and so on about water resources by different plate shape change through a model experiment examine closely need to.

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리모트 프라즈마 전원용 하프 브리지 인버터의 운전 특성 (A Operation characteristics of the HB inverter for Remote Plasma Source)

  • 김수석;원충연;최대규;최상돈
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2003년도 춘계전력전자학술대회 논문집(2)
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    • pp.611-615
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    • 2003
  • In this paper, a operation characteristics and analysis of the HB(half bridge) inverter for remote plasma system are studied. the remote plasma system is cleaning system for the chemical vapor deposition (CVD) chamber in semiconductor processing. The remote plasma system is powered by the RF generator The main power stage of the RF generator is used for the HB PWM inverter with an low pass filter in the secondary circuit of the transformer. The detailed mode analysis of HB invertor was described. The operation characteristics of Remote Plasma Source are verified by simulation and experimental results.

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Selective Dual Duty Cycle Controlled High Frequency Inverter Using a Resonant Capacitor in Parallel with an Auxiliary Reverse Blocking Switch

  • Saha, Bishwajit;Suh, Ki-Young;Kwon, Soon-Kurl;Mishima, Tomokazu;Nakaoka, Mutsuo
    • Journal of Power Electronics
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    • 제7권2호
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    • pp.118-123
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    • 2007
  • This paper presents a new ZCS-PWM high frequency inverter. Zero current switching operation is achieved in the whole load range by using a simple auxiliary reverse blocking switch in parallel with series resonant capacitor. Dual duty cycle control scheme is used to provide a wide range of high frequency AC output power regulation that is important in many high frequency inverter applications. It found that a complete soft switching operation can be achieved even for low power setting ranges by introducing high-frequency dual duty cycle control scheme. The proposed high frequency inverter is more suitable for consumer induction heating(IH) applications. The operation and control principle of the proposed high frequency inverter are described and verified through simulated results.

80μW/MHz 0.68V Ultra Low-Power Variation-Tolerant Superscalar Dual-Core Application Processor

  • Kwon, Youngsu;Lee, Jae-Jin;Shin, Kyoung-Seon;Han, Jin-Ho;Byun, Kyung-Jin;Eum, Nak-Woong
    • IEIE Transactions on Smart Processing and Computing
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    • 제4권2호
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    • pp.71-77
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    • 2015
  • Upcoming ground-breaking applications for always-on tiny interconnected devices steadily demand two-fold features of processor cores: aggressively low power consumption and enhanced performance. We propose implementation of a novel superscalar low-power processor core with a low supply voltage. The core implements intra-core low-power microarchitecture with minimal performance degradation in instruction fetch, branch prediction, scheduling, and execution units. The inter-core lockstep not only detects malfunctions during low-voltage operation but also carries out software-based recovery. The chip incorporates a pair of cores, high-speed memory, and peripheral interfaces to be implemented with a 65nm node. The processor core consumes only 24mW at 350MHz and 0.68V, resulting in power efficiency of $80{\mu}W/MHz$. The operating frequency of the core reaches 850MHz at 1.2V.

저낙차용 수차의 동력전달 스프로켓 휠 이의 하중분포 해석 (Load distribution analysis of a sprocket wheel tooth for a low head hydro-turbine power transmission system)

  • 강용석;김현수;김현진
    • 대한기계학회논문집
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    • 제18권5호
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    • pp.1087-1095
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    • 1994
  • Chain drive power transmission system was developed for a low head hydro-turbine which generates power by energy transformation on the turbine blades attached to chains. Also, experimental and theoretical analysis for the sprocket wheel tooth load distribution were performed. The tooth load was measured by the specially designed load sensor. It was found that the tooth load distribution for the steady state operation was in good accordance with the quasi-static state results showing the peak load at the final meshing tooth. The trend of the experimental results agreed with the theoretical results based on the spring model analysis and difference in the magnitude of the maximum tooth load was considered to be the effect of the variable spring constant due to the moving contact point between the roller and sprocket wheel tooth.

저전력 소모와 테스트 용이성을 고려한 회로 설계 (A study on low power and design-for-testability technique of digital IC)

  • 이종원;손윤식;정정화;임인칠
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 1998년도 하계종합학술대회논문집
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    • pp.875-878
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    • 1998
  • In this thesis, we present efficient techniques to reduce the switching activity in a CMOS combinational logic network based on local logic transforms. But this techniques is not appropriate in the view of testability because of deteriorating the random pattern testability of a circuit. This thesis proposes a circuit design method having two operation modes. For the sake of power dissipation(normal operation mode), a gate output switches as rarely as possible, implying highly skewed signal probabilities for 1 or 0. On the other hand, at test mode, signals have probabilities of being 1 or 0 approaching 0.5, so it is possible to exact both stuck-at faults on the wire. Therefore, the goals of synthesis for low power and random pattern testability are achieved. The hardware overhead sof proposed design method are only one primary input for mode selection and AND/OR gate for each redundant connection.

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