• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.07a
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• pp.523-526
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• 2001

In this paper, we design and fabricate the high-efficiency and low-power switched-capacitor DC-DC converter. This converter consists of internal oscillator, output driver and output switches. The internal oscillator has 100kHz oscillation frequency and the output switches composed of one pMOS transistor and three nMOS transistors. According to the configuration of two external capacitors, the converter has three functions that are the Inverter, Doubler and Divider. The proposed converter is fabricated through the 0.8$\mu\textrm{m}$ 2-poly, 2-metal CMOS process. The simulation and experimental result for fabricated IC show that the proposed converter has the voltage conversion efficiency of 98% and power efficiency more than 95%.

• Proceedings of the KIPE Conference
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• 2008.06a
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• pp.520-522
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• 2008

A novel two-switch active clamp forward converter suitable for high input voltage applications is proposed. The main advantage of the proposed converter, compared to the conventional active forward converters, is that circuit complexity is reduced and the voltage stress of the main switches is effectively clamped to either the input voltage or the clamping capacitor voltage by two clamping diodes without limiting the maximum duty ratio. Also, the clamping circuit does not include additional active switches, so a low cost can be achieved without degrading the efficiency. Therefore, the proposed converter can feature high efficiency and low cost for high input voltage applications. The operational principles, features, and design considerations of the proposed converter are presented in this paper. The validity of this study is confirmed by the experimental results from a prototype with 200W, 375V input, and 12V output.

• Proceedings of the KIPE Conference
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• 2005.07a
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• pp.445-448
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• 2005

A new high efficiency phase shifted full bridge (PSFB) converter for sustaining power module of plasma display panel (PDP) is proposed in this paper .The proposed converter employs the rectifier of voltage doubler type without output inductor. Since it has no output inductor, the voltage stresses of the secondary rectifier diodes can be clamped at the level of the output voltage. Therefore, no dissipative resistor-capacitor (RC) snubber for rectifier diodes is needed and a high efficiency as well as low noise cutout voltage can be realized. In addition, due to elimination of the large output inductor, it features a simple structure, lower cost, less mass, and lighter weight. Furthermore, the proposed converter has wide zero voltage switching (ZVS ) ranges with low current stresses of the primary switches. Also the resonance between the leakage inductor of the transformer and the capacitor of the voltage doubler cell makes the current stresses of the primary switches and rectifier diodes reduced. In this paper, the operational principles, analysis of the proposed converter, and the experimental results are presented.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.8
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• pp.1887-1894
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• 2010

This paper proposes a new switched-capacitor sigma-delta modulator for automotive radars. Developed modulator is used to perform high-resolution analog-to-digital conversion (ADC) of high frequency band signal in a radar system. It has supply voltage of 2.7V, and has body-effect compensated switch configuration with low voltage and low distortion. The modulator has been implemented in a $0.25{\mu}m$ double-poly and triple-metal standard CMOS process, and it has die area of $1.9{\times}1.5mm^{2}$. It showed better total harmonic distortion of 20dB than the conventional bootstrapped circuit at the supply voltage of 2.7V.

• Proceedings of the KIPE Conference
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• 2018.07a
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• pp.288-289
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• 2018

In this paper, the coupled inductor scheme instead of noncoupled inductors is suggested to reduce the dimension, weight and cost of the magnetic core. The simulation results have verified the effectiveness of the flying-capacitor MMC with coupled inductors and its control method for medium-voltage induction motor drives at low-speed operation.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.1
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• pp.52-58
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• 2009

A low voltage, low power delta-sigma modulator is proposed for cardiac pacemaker applications. A cascade of delta-sigma modulator stages that employ a feedforward topology has been used to implement a high-resolution oversampling ADC under the low supply. An inverter-based switched-capacitor circuit technique is used for low-voltage operation and ultra-low power consumption. An experimental prototype of the proposed circuit has been implemented in a $0.35-{\mu}m$ CMOS process, and it achieves 61-dB SNDR, 63-dB SNR, and 65-dB DR for a 120-Hz signal bandwidth at 7.6-kHz sampling frequency. The power consumption is only 280 nW at 1-V power supply.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.53 no.5
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• pp.345-352
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• 2004

Currently, high data rate PLC(Power Line Communications), up to 100 Mbps, which use frequency bandwidth between 2 MHz and 30 MHz is investigated very hard, and commercial PLC modem for low voltage powerline network (indoor) is coming soon into communication market. For the purpose of developing a fit communication system which has little distortion of signal and attenuation, it is surely necessary to know about channel environments of powerline. Especially, the impedance measurement of the powerline and impedance matching are very important. As is known, since medium-voltage powerline (22.9 ㎸) is still working, it is not so simple to measure the powerline impedance. In our study, a portable impedance measurement equipment is developed. It consists of coupling capacitor, a drain coil and impedance matching transformer. The equipment is easily connected to medium voltage line and impedance of power line is measured using a network analyzer. Also, measurement results are used for impedance matching of PLC signal. In fact, matching transformer with several different impedances are used. The matching transformer is connected between coupling capacitor and signal port. In this paper, the developed portable impedance measurement equipment and impedance measurement results are presented. Also impedance matching technique using matching transformers will be explained. We showed the result of the improved performance by the impedance matching.

• Journal of Power Electronics
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• v.4 no.1
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• pp.18-27
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• 2004

The output storage capacitor of the PFC converters is commonly designed for the selected hold-up time or the allowed output ripple voltage percentage. Nevertheless, this output capacitor is a main contribution factor to the PFC system stability. Moreover, seeking for a minimum output storage capacitor that assures the PFC desired operation under all condition, and providing the advantage of a small size and low cost is the main interesting target for engineering. Therefore, in this issue the design steps of the PFC converter have been discussed depending on three choices, output ripple, hold-up time, and stability. It is cleared that any design must take the minimum required storage capacitor for stability prospective as step-l in deign, then apply for any other specification like hold-up time or ripple percentage.

• Transactions of the Korean Society of Automotive Engineers
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• v.14 no.6
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• pp.24-33
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• 2006

This experiment explains about electrical braking equipment which will be used for 1.2kW PEMFC HEV. The equipment is made of BLDC motor and super capacitor(EDLC). The circuit is designed for regeneration braking that can save the energy from low voltage of generation with BLDC motor. Increasing a regeneration energy from braking system is effected with regeneration current and SoC of super capacitor(EDLC). Electrical braking in electrical vehicle is suitable for regeneration braking with dynamic braking together.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.43 no.2
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• pp.206-215
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• 1994

A method for simulating general characteristics and temperature characteristics of discharging SCR of the capacitor discharge impulse magnetizer-magnetizing fixture system using SPICE is presented. This method has been developed which can aid the design, understanding and inexpensive, time-saving of magnetizing circuit. As the detailed characteristic of magnetizing circuit can be obtained, the efficient design of the magntizing circuit which produce desired magnet will be possible using our SPICE modeling. Especially, computation of the temperature rise of discharging SCR is very important since it gives some indication of thermal characteristic of discharging circuit. It is implemented on a 486 personal computer, and the modeling results are checked against experimental measures. The experimental results have been achived using 305[V] and 607[V] charging voltage, low-energy capacitor discharge impulse magnetizer-magnetizing fixture of air cleaner DC motor.