• Title/Summary/Keyword: Loop technique

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Implementation of Power Line Transmission System using A New Digital Lock Loop (디지털 지연동기루프 개발에 의한 전력선 전송시스템 구현)

  • 정주수;박재운;변건식
    • Journal of the Korea Society of Computer and Information
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    • v.4 no.2
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    • pp.105-112
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    • 1999
  • Spread Spectrum Communication is a core technique in CDMA system, but the problem for SS Communication schemes is synchronous method. There are DLL(Delay Lock Loop), Tau-dither Loop, SO(Synchronous Osillator) etc., in the sychronous method. But since there are analog operations, the setting is difficult and circuit size is large. In this paper we proposed Digital Delay Lock Loop (DDLL) and estimated it's performance through the experiment.

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Assessment of Magnetic Field Mitigation and Electrical Environmental Effects for Commercially Operating 154kV Transmission Lines with Passive Loop

  • Lee, Byeong-Yoon;Myung, Sung-Ho;Ju, Mun-No;Cho, Yeun-Gyu;Lee, Dong-Il;Lim, Yun-Seog;Kim, Sang-Beom
    • Journal of Electrical Engineering and Technology
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    • v.9 no.3
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    • pp.991-996
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    • 2014
  • Power frequency magnetic field is still a critical problem for new construction of overhead power transmission lines in Korea because most people have been concerned about possibly carcinogenic effects of it. Although reference level of power frequency(60Hz) magnetic field has been set to 200uT in ICNIRP guidelines published in 2010, Korean government has no intention of adjusting 83.3uT specified by law in 2006 to this new reference level in consideration of people's concerns for the time being. Regardless of the current regulated magnetic field value, electric utility company has been trying to reduce magnetic field in the residential area in the vicinity of overhead power transmission lines to take into account of public concerns on the long-term effect of magnetic fields. In an effort to reduce magnetic field, engineering side has made considerable efforts to develop passive loop based, cost-effective mitigation technique of power frequency magnetic field more than ten years. In order to verify developed power frequency magnetic field mitigation technique based on passive loop, a horizontal type of passive loop was designed and installed for commercially operating 154kV overhead power transmission line for the first time in Korea. The measurement results before and after the installation of passive loop showed that magnetic field could be reduced to about 20%. The electrical environmental effects such as AN, RI and TVI were assessed before and after the installation of passive loop and these values were complied with the requirements specified by electric utility. It has been confirmed from the field test results that passive loop could be commercially and cost-effectively utilized to mitigate power frequency magnetic field.

A COMOS Oversampling Data Recovery Circuit With the Vernier Delay Generation Technique

  • Jun-Young Park
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.25 no.10A
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    • pp.1590-1597
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    • 2000
  • This paper describes a CMOS data recovery circuit using oversampling technique. Digital oversampling is done using a delay locked loop circuit locked to multiple clock periods. The delay locked loop circuit generates the vernier delay resolution less than the gate delay of the delay chain. The transition and non-transition counting algorithm for 4x oversampling was implemented for data recovery and verified through FPGA. The chip has been fabricated with 0.6um CMOS technology and measured results are presented.

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Design Optimization of a Compressor Loop Pipe using Response Surface Method (반응표면법을 이용한 압축기 루프 파이프의 최적 설계)

  • 강정환;박종찬;김좌일;왕세명;정충민
    • Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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    • 2004.05a
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    • pp.404-409
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    • 2004
  • A compressor loop pipe is the most important part in a refrigerator from the view of structural vibration and noise. Vibration energy generated from a compressor's inner body is transmitted to the shell and outside through the loop pipe. For this reason it is very important to design a compressor loop pipe. But, for geometrical complexity and dynamic nonlinearity of the loop pipe, analysis and design of the loop pipe is very difficult. So the statistical and experimental methods have to be used for design of this system. The response surface method (RSM) becomes a popular meta-modeling technique f3r the complex system as this loop pipe. As starting point of loop pile's optimization, FEA model and simple experimental model are used instead of the real loop pipe model. After RS model was constructed, using sensitivity-based optimizer performed optimization for the loop pipe. And the moving least square method (MLSM) was applied to reduce the approximation error.

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Under the fading channel environment, performance evaluation of AF CR loop Due to the quantization effect (페이딩 채널 환경하에서의 양자화 특성에 의한 AF CR loop의 성능평가)

  • 송재철;이경하;김선형;최형진
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.21 no.3
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    • pp.737-746
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    • 1996
  • In this paper, we present simulation result of quantization effects about a new Angular From Carrier Recovery Loop(AF CR loop) for PSK modulation technique. AF CR loop includes detected angle symbol and Multi Level hardimiter. In general, detected angle is used in dtermining symbol. Because detected angle is used to make an error signal of phase detector output, hardware implementation of AF CR loop is simpler than that of other loops. Before hardware implementation of AF CR loop, the result due to quantization effect should be investigated. In order to confirm quntization effect of AF CR loop, we evaluate performance of this loop by Monte-Carlosimulation method. Under both in the AWGN and Jake's fading noise channel environments, we confirmed the characteristics of AF CR loop in terms of RMS jitter due to quntization effect. Differential APSK modulation schemeis used in this paper. Especially, Jake's fading channel is used as a channel model and also AGC(Automatic Gain Control) is used in the overall process of performance evaluation. We obtained the resonable result of quantization effect about AF CR loop. With the result of performanceevaluation based on quantization effects, we can expect to operate AF CRloop under the fading channel environments reasonably well.

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A RX Cancellation Loop Configyration for TX Power Amplifier Module (수신대역 Cancellation Loop를 갖는 송신단 전력 증폭기 설계)

  • Jeong, yong-Chae;Park, Jun-Seok;Ahn, Dal;Lim, Jae-Bong
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.11 no.7
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    • pp.1156-1160
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    • 2000
  • The cancellation loop configuration for power amplifier module is proposed to reject the RX signals using feed-forward technique. In this paper, we implement the 1W-ampilfier module of WLL band to show validity of the proposed cancellation loop. The power amplifier module with the proposed cancellation loop can provide low TX insertion path loss due to duplexer and choice of loose RX attenuation characteristic for various wireless communication systems. It shows at least 90 % improved RX rejection characteristic compared to power amplifier module without RX band cancellation loop.

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A Lock-Time Improvement for an X-Band Frequency Synthesizer Using an Active Fast-Lock Loop Filter

  • Heo, Yun-Seong;Oh, Hyun-Seok;Jeong, Hae-Chang;Yeom, Kyung-Whan
    • Journal of electromagnetic engineering and science
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    • v.11 no.2
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    • pp.105-112
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    • 2011
  • In phase-locked frequency synthesizers, a fast-lock technique is frequently employed to overcome the trade-off between a lock-time and a spurious response. The function of fast-lock in a conventional PLL (Phased Lock Loop) IC (Integrated Circuit) is limited by a factor of 16, which is usually implemented by a scaling of charge pumper, and consequently a lock time improvement of a factor of 4 is possible using the conventional PLL IC. In this paper, we propose a novel external active fast-lock loop filter. The proposed loop filter provides, conceptually, an unlimited scaling of charge pumper current, and can overcome conventional trade-off between lock-time and spur suppression. To demonstrate the validity of our proposed loop-filter, we fabricated an X-band frequency synthesizer using the proposed loop filter. The loop filter in the synthesizer is designed to have a loop bandwidth of 100 kHz in the fast-lock mode and a loop bandwidth of 5 kHz in the normal mode, which corresponds to a charge pumper current change ratio of 400. The X-band synthesizer shows successful performance of a lock-time of below 10 ${\mu}sec$ and reference spur suppression below -64 dBc.

Improved DC Offset Error Compensation Algorithm in Phase Locked Loop System

  • Park, Chang-Seok;Jung, Tae-Uk
    • Journal of Electrical Engineering and Technology
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    • v.11 no.6
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    • pp.1707-1713
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    • 2016
  • This paper proposes a dc error compensation algorithm using dq-synchronous coordinate transform digital phase-locked-loop in single-phase grid-connected converters. The dc errors are caused by analog to digital conversion and grid voltage during measurement. If the dc offset error is included in the phase-locked-loop system, it can cause distortion in the grid angle estimation with phase-locked-loop. Accordingly, recent study has dealt with the integral technique using the synchronous reference frame phase-locked-loop method. However, dynamic response is slow because it requires to monitor one period of grid voltage. In this paper, the dc offset error compensation algorithm of the improved response characteristic is proposed by using the synchronous reference frame phase-locked-loop. The simulation and the experimental results are presented to demonstrate the effectiveness of the proposed dc offset error compensation algorithm.

Design of Force Rebalance Loop for Silicon Accelerometer using Parametric Robust Control Technique (변수적 강인해석기법을 이용한 실리콘 가속도계의 재평형루프 설계)

  • Seong, Sang-Gyeong;Lee, Jang-Gyu;Gang, Tae-Sam
    • The Transactions of the Korean Institute of Electrical Engineers D
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    • v.49 no.3
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    • pp.124-132
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    • 2000
  • In this paper, presented are an active surface-micromachined silicon accelerometer, force rebalance loop using parametric robust control method, and experimental results with a real micromachined accelerometer. And finally, a robust controller of the form of PID compensator was designed to construct force rebalance loop. Through the frequency response analysis, it is shown that the loop guarantees appropriate stability and robustness. Experiments with a real accelerometer demonstrated that the proposed loop effectively controls the position of the accelerometer's proof mass. It also demonstrated that the resolution of the fabricated accelerometer is better than 1mg. Compared with a commercial accelerometer the proposed force rebalance silicon accelerometer showed better performances.

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A Design Method of QFT with Improved Loop Shaping Approach using GA (GA를 이용한 개선된 루프 형성법을 갖는 QFT 설계방법)

  • Kim, Ju-Sik;Lee, Sang-Hyuk;Ryu, Jeong-Woong
    • The Transactions of the Korean Institute of Electrical Engineers A
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    • v.48 no.8
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    • pp.972-979
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    • 1999
  • QFT(Quantitative Feedback Theory) is a very practical design technique that emphasizes the use of feedback for achieving the desired system performance tolerances in despite of plant uncertainty and disturbance. The fundamental concept of QFT is a loop shaping procedure that a suitable controller can be found by shaping a nominal loop transfer function. The loop shaping synthesis involves the identification of a structure and the specialization of parameter optimization of a desired system. This paper presents an improved loop shaping approach of QFT with model validation using GA(Genetic Algorithm). The method presented in this paper removes the problems of iterative operation, transformation error, and model validation in the conventional methods without consideration of frequency domain.

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