• Title/Summary/Keyword: Loop

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Design and Performance Analysis of a Noncoherent Code Tracking Loop for 3GPP MODEM (3GPP 모뎀용 동기 추적회로의 설계 및 성능 분석)

  • 양연실;박형래
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.28 no.12A
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    • pp.983-990
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    • 2003
  • In this paper, a noncoherent code tracking loop is designed for 3GPP MODEM and its performance is analyzed in terms of steady-state jitter variance and transient response characteristics. An analytical closed-form formula for steady-state jitter variance is Int derived for AWGN environments as a general function of a pulse-shaping filter, timing offset, signal-to-interference ratio, and loop bandwidth, together with the analysis on the transient response characteristic of a tracking loop. Based on the analysis, the code tracking loop with variable loop bandwidth that is efficient for full digital H/W implementation is designed and its performance is compared with that of the code tracking loop with fixed loop bandwidth, along with the verification by computer simulations.

Low Noise Phase Locked Loop with Negative Feedback Loop including Frequency Variation Sensing Circuit (주파수 변화 감지 회로를 포함하는 부궤환 루프를 가지는 저잡음 위상고정루프)

  • Choi, Young-Shig
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.13 no.2
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    • pp.123-128
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    • 2020
  • A low phase noise phase locked loop (PLL) with negative feedback loop including frequency variation sensing circuit (FVSC) has been proposed. The FVSC senses the frequency variation of voltage controlled oscillator output signal and controls the volume of electric charge in loop filter capacitance. As the output frequency of the phase locked loop increases, the FVSC reduces the loop filter capacitor charge. This causes the loop filter output voltage to decrease, resulting in a phase locked loop output frequency decrease. The added negative feedback loop improves the phase noise characteristics of the proposed phase locked loop. The size of capacitance used in FVSC is much smaller than that of loop filter capacitance resulting in no effect in the size of the proposed PLL. The proposed low phase noise PLL with FVSC is designed with a supply voltage of 1.8V in a 0.18㎛ CMOS process. Simulation results show the jitter of 273fs and the locking time of 1.5㎲.

Design of NCO in Carrier recovery loop for QPSK Demodulator (QPSK 복조기를 위한 Carrier recovery loop의 NCO 설계)

  • 하창우;이완범;김형균;김환용
    • Proceedings of the IEEK Conference
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    • 2000.09a
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    • pp.907-910
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    • 2000
  • QPSK 복조기는 위상 오차에 따른 문제점을 극복하기 위해 수신단에서는 반송파의 주파수와 위상을 tracking 하는 Carrier recovery loop부분이 필요하다〔1〕. Carrier recovery loop는 multiplier, arm filter, matched filter, decimator, loop filter, NCO로 구성이 된다〔2〕.기존 Carrier recovery loop의 NCO는 sine과 cosine의 lookup table을 갖는 구조로 되어있어, 전력소모가 크다는 문제점을 가지고 있다. 따라서 본 논문에서는 lookup table을 사용하지 않는 저 전력 구조의 QPSK복조기의 Carrier recovery loop의 NCO를 설계했다.

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Parallelism for Single Loops with Multiple Dependences

  • Jeong, Sam-Jin
    • International Journal of Contents
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    • v.3 no.3
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    • pp.15-19
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    • 2007
  • We review some loop partitioning techniques such as loop splitting method by thresholds and Polychronopoulos' loop splitting method for exploiting parallelism from single loop which already developed. We propose improved loop splitting method for maximizing parallelism of single loops with non-constant dependence distances. By using the iteration and distance for the source of the first dependence, and by our defined theorems, we present generalized and optimal algorithms for single loops with non-uniform dependences. The algorithms generalize how to transform general single loops with one dependence as well as with multiple dependences into parallel loops.

LOW-DENSITY CLOSE-CLOSED LOOP BURST ERROR DETECTING CODES

  • Dass, Bal-Kishan;Jain, Sapna
    • Journal of applied mathematics & informatics
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    • v.9 no.1
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    • pp.231-238
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    • 2002
  • In this paper, we study cyclic codes detecting a subclass of close-closed loop bursts viz. low-density close-closed loop bursts. A subclass of CT close-closed loop berets called CT low-density close-closed loop bursts is also studied.

The Implementation and Experiments of Open-Loop Cylindrical Vibratory Gyroscope (개루프 제어의 실린더 진동형 자이로 구현 및 실험)

  • 공형직;김정엽;홍성경
    • Journal of Institute of Control, Robotics and Systems
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    • v.10 no.8
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    • pp.669-672
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    • 2004
  • This paper considers the implementation and experiments of an open-loop Cylindrical Vibratory Gyroscope(CGV). An open-loop CGV composed of thin cylindrical vibrating element, electromagnetic drive and pick-off element with open-loop control was designed and fabricated. The experimental performance tests of the open-loop CGV were done using a temperature chambered rate table. Also, the limitations of open-loop CGV were analyzed and the solution for the limitations was proposed.

An Efficient Loop Splitting Method on Single Loop with Non-uniform Dependences (비균일 단일루프에서의 효율적인 루프 분할 방법)

  • Jeong Sam-Jin
    • The Journal of the Korea Contents Association
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    • v.5 no.4
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    • pp.204-211
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    • 2005
  • This paper introduces three loop splitting methods such as minimum dependence distance method, Polychronopoulous' method, and first dependence method for exploiting parallelism from single loop which already developed. And it also Indicates their several problems. We extend the first dependence method which is the most effective one among three loop splitting methods, and propose more powerful loop splitting method to enhance parallelism on single loop. The proposed algorithm solves several problems, such as anti-flow dependence and g=gcd(a,c) > 1, that the first dependence method has.

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Passive Mode Locking of Figure '8' Type Erbium-doped Fiber Ring Laser Using Nonlinear Loop Mirror (비선형 Loop Mirror 방식을 이용한 '8'자 고리형 Erbium 광섬유 레이저의 수동형 모드 록킹)

  • 박희갑
    • Korean Journal of Optics and Photonics
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    • v.4 no.3
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    • pp.330-337
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    • 1993
  • Figure '8' type, passively-mode-locked erbium-doped-fiber ring laser was developed, incorporating a nonlinear loop mirror. Transmittance of the loop mirror was found to be dependent on the incident light intensity due to the non-reciprocal nonlinear phase shift, which enables the passive mode locking of the laser. Self-starting of stable mode locking was possible with only controlling the polarization controllers inside the cavity without any help of external perturbation or modulation. The mode-locked output pulse shape was discussed in relation with the transmission characteristics of nonlinear loop mirror.

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Stress Analysis of IPS Lower bracket

  • Lee, J.M.;Park, K.N.;Chi, D.Y.;Park, S.K.;Sim, B.S.;Lee, H.H.;Ahn, S.H.;Lee, C.Y.;Kim, H.R.
    • Proceedings of the Korean Nuclear Society Conference
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    • 2005.10a
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    • pp.703-704
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    • 2005
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A Design of an Integer-N Dual-Loop Phase.Delay Locked Loop (이중루프 위상.지연고정루프 설계)

  • Choi, Young-Shig;Choi, Hyek-Hwan
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.15 no.7
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    • pp.1552-1558
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    • 2011
  • In this paper, a dual-loop Integer-N phase-delay locked loop(P DLL) architecture has been proposed using a low power consuming voltage controlled delay line(VCDL). The P DLL can have the LF of one small capacitance instead of the conventional second or third-order LF which occupies a large area. The proposed dual-loop P DLL can have a small gain VCDL by controlling the magnitude of capacitor and charge pump current on the loop of VCDL. The proposed dual-loop P DLL has been designed based on a 1.8V $0.18{\mu}m$ CMOS process and proved by Hspice simulation.