• The Magazine of the IEIE
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• v.22 no.2
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• pp.37-50
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• 1995

This paper reviews NTT Laboratories' research and development of x-ray lithography during the last ten years since the application of synchrotron orbital radiation(SOR). First, the historical background of x-ray lithograhpy research, NTT's research programs on synchrotron x-ray lithography(SOR lithography), and the current status of NTT's SOR lithography system are overviewed. Then, the key elements of SOR lithography system are reviewed, including the electron storage ring, the x-ray stepper, and the x-ray mask. Finally the appilcation of SOR lithography technology to device fabrication is reported.

• Journal of the Korean Society for Precision Engineering
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• v.26 no.6
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• pp.7-13
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• 2009

• Proceedings of the Korean Society Of Semiconductor Equipment Technology
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• 2005.05a
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• pp.201-207
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• 2005

디스플레이 장치를 제조함에 있어 Lithography 공정은 매우 중요한 공정으로 인식되고 있으나 아직까지 Lithography 장비의 국내 기술개발 수준은 선진사에 비해 많이 뒤져있다고 볼 수 있다. 최근 디스플레이 산업의 폭발적인 성장과 더불어 보다 확실하고 안정적인 생산을 위해서는 Lithography 장비의 국산화 기술개발이 시급한 상황이다. 본 연구는 Lithography 장비를 구성하는 핵심기술요소 중 Stage 최적화에 대하여 현재 국내외에서 개발된 또는 개발중인 제품들을 비교 분석하고, 최적화 설계를 위해 필요한 조건들에 대하여 고찰해보았다.

• Proceedings of the Korean Society for Technology of Plasticity Conference
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• 2008.10a
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• pp.325-328
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• 2008

With intensive research and development to mass particular nanostructure of 10nm, Nanoimprint lithography will soon be put to practical use. This paper reviews latest research and application trend and also covers technical articles about Nanoimprint lithography technology Published since 1998, including statistical analysis of collected data(Web of Science DB) and related technical trend.

• Proceedings of the IEEK Conference
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• 1999.06a
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• pp.269-274
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• 1999

As the semiconductor industry enters the next century, we are facing to the technological changes and challenges. Optical lithography has driven by the miniaturisation of semiconductor devices and has been accompanied by an increase in wafer productivity and performance through the reduction of the IC image geometries. In the last decade, DRAM(Dynamic Random Access Memories) have been quadrupoling in level of integration every two years. Korean chip makers have been produced the memory devices, mainly DRAM, which are the driving force of IC＇s(Integrated Circuits) development and are the technology indicator for advanced manufacturing. Therefore, Korean chip makers have an important position to predict and lead the patterning technology. In this paper, we will be discussed the limitations of the optical lithography, such as KrF and ArF. And, post optical lithography technology, such as E-beam lithography, EUV and E-beam Projection Lithography shall be introduced.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.6
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• pp.824-831
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• 2014

In this study, structural variations and overlay errors caused by multiple patterning lithography techniques to print narrow parallel metal interconnects are investigated. Resistance and capacitance parasitic of the six lines of parallel interconnects printed by double patterning lithography (DPL) and triple patterning lithography (TPL) are extracted from a field solver. Wide parameter variations both in DPL and TPL processes are analyzed to determine the impact on signal propagation. Simulations of 10% parameter variations in metal lines show delay variations up to 20% and 30% in DPL and TPL, respectively. Monte Carlo statistical analysis shows that the TPL process results in 21% larger standard variation in delay than the DPL process. Crosstalk simulations are conducted to analyze the dependency on the conditions of the neighboring wires. As expected, opposite signal transitions in the neighboring wires significantly degrade the speed of signal propagation, and the impact becomes larger in the C-worst metals patterned by the TPL process compared to those patterned by the DPL process. As a result, both DPL and TPL result in large variations in parasitic and delay. Therefore, an accurate understanding of variations in the interconnect parameters by multiple patterning lithography and adding proper margins in the circuit designs is necessary.

• Vacuum Magazine
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• v.1 no.3
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• pp.14-20
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• 2014

Lithography is widely recognized as one of the key steps in the manufacture of ICs and other devices and/or structures. However, as the dimensions of features made using lithography become smaller, lithography is becoming a more critical factor for enabling miniature IC or other devices and/or structures to be manufactured. As explained above, to make it happen, many other important technologies will have to be addressed. The vacuum technology is one of them and the engineers and experts are paying attention on vacuum technology including vacuum pumps. Especially high Vacuum(HV) and Ultra high vacuum(UHV) are not easy and not simple one. So the manpower who can understand vacuum technology with long experience in vacuum industry is important with basic study.

• Vacuum Magazine
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• v.2 no.1
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• pp.10-16
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• 2015

With the recognition of nanotechnology as one of the future strategic technologies, the R&D efforts have been performed under exclusive supports of governments and private sectors. At present, nanotechnology is at the focus of research and public attention in almost every advanced country including USA, Japan, and many others in EU. Keeping tracks of such technical trends, center for nanoscale mechatronics and manufacturing (CNMM) was established in 2002 as a part of national nanotechnology promotion policy led by ministry of science and technology (MOST) in Korea. It will hold widespread potential applications in electronics, optical electronics, biotechnology, micro systems, etc, with the promises of commercial visibility and competitiveness. In this paper, wafer scale multilayer nanoimprint lithography technology which is well-known the next generation lithography, roll-typed nanoimprint lithography (R-NIL), roll-typed liquid transfer imprint lithography (R-LTIL), the key technology for nanomanufacturing and nanoscale measurement technology will be introduced. Additionally, its applications and some achievements such as solar cell, biosensor, hard disk drive, and MOSFET, etc by means of the developed multilayer nanoimprint lithography system are introduced.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2003.06a
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• pp.196-198
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• 2003

Classical lithography in semiconductor employs stepper technologies. Limits of this technology are clearly seen at structures below 100nm. Nano-imprinting lithography is a new method for generating patterns in submicron range at reasonable cost. In order to manufacture nano-imprinting lithography(NIL) equipment, several NIL manufacturers have been developing key technologies for realization of nano-imprinting process, recently. In this paper, we've been describe state-of-the-art and technology trends for nano-imprinting lithography equipments.

• Journal of the Korean Magnetics Society
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• v.17 no.4
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• pp.178-181
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• 2007

Electron beam lithography has been studied as a next-generation lithography technology instead of photo lithography for ULSI semiconductor devices. In this work, we have made a low-energy electron beam lithography system based on the microcolumn and investigated the dependence of the pattern thickness on the energies and dose concentration of the electron beam. We have also demonstrated the potential of low-energy lithography by achieving 100 nm-$SiO_2$ thin film patterning.