• The Transactions of the Korean Institute of Power Electronics
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• 제20권6호
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• pp.558-565
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• 2015

Gallium nitride high-electron mobility transistor (GaN HEMT) is the strongest candidate for replacing Si MOSFET. Comparing the figure of merit (FOM) of GaN with the state-of-the-art super junction Si MOSFET, the FOM is much better because of the wide band gap characteristics and the heterojunction structure. Although GaN HEMT has many benefits for the power conversion system, the performance of the power conversion system with the GaN HEMT is sensitive because of its low threshold voltage ($V_{th}$) and even lower parasitic capacitance. This study examines the characteristics of a phase-shifted full-bridge dc-dc converter with cascode GaN HEMT. The problem of unoptimized dead time is analyzed on the basis of the output capacitance of GaN HEMT. In addition, the printed circuit board (PCB) layout consideration is analyzed to reduce the negative effects of parasitic inductance. A comparison of the experimental results is provided to validate the dead time and PCB layout analysis for a phase-shifted full-bridge dc-dc converter with cascode GaN HEMT.

• Korean Institute of Interior Design Journal
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• 제14권4호
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• pp.79-86
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• 2005

According to the new multi-media appeared as a result of rapid growth of the information and science technique, the school library must be changed to the integration of the teach-study media resource from the existing print media. It means that the school library has to play a role of the study center with a different media from the existing teaching material, teaching instrument, facility and opportunity. The Information education must be conducted in the way of an integrated education course and able to do both information transaction and problem settlement. The education facility to solve this problem is the school library. Therefore, the school library becomes important more and more. It means that the school library is the center of entire study and education material for the teacher and student is focused on it. It is urgent to make the standard of the school library In order to cope with the new education and information environments. And especially it is very important to make a plan about the location and scale of the school library to improve the quality of the children's studying activity. The location of the school library is decided under consideration of the relationship with other room of school house and the proper scale of it is between 2.5units and 7.0units of classroom based on the number of class.

• Journal of the Korea Society of Computer and Information
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• 제22권9호
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• pp.81-89
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• 2017

The CRP(Container Relocation Problem) algorithms pursuing efficient container relocation of wharf container terminal can not be deterministic because of the large number of layout cases. Therefore, the CRP algorithms should adopt trial and error intuition and experimental heuristic techniques. And because the heuristic can not be best for all individual cases, it is necessary to find metrics which show excellent on average. In this study, we analyze GLAH(Greedy Look-ahead Heuristic) algorithm which is one of the recent researches in detail, and propose a heuristic metrics HOB(sum of the height differences between a badly placed container and the containers prohibited by the badly placed container) to improve the algorithm. The experimental results show that the improved algorithm, GLAH', exerts a stable performance increment of up to 3.8% in our test data, and as the layout size grows, the performance increment gap increases.

• Proceedings of the Korean Institute of Building Construction Conference
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• 한국건축시공학회 2002년도 학술.기술논문발표회
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• pp.133-138
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• 2002

Rebar work takes up big proportion in a construction work. The current process of purchasing, cutting and election, and working of rebar induces a lot of loss in rebar. This study is focused on analyzing the problem and the present condition of the process from the calculating of rebar quantifies to the actual constructional stage through surveying those who have experience in the estimation department, or the construction site of a domestic construction company. Many reform measures such as diversification of standard(i.e., 8-meter)bar, calculation of rebar quantities and construction according to the rebar election drawing, expansion of accuracy in layout plan, thoroughness in examination of layout plan in advance, utilization of the worked material, systemization of rebar control(management), and a shift in attitude of the field(site) manager were proposed as the result of the survey.

• Journal of Korean Institute of Industrial Engineers
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• 제22권2호
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• pp.179-188
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• 1996

We study n-class-based storage policy for an automated storage/retrieval system (AS/RS) and derive the closed form expressions of expected travel times under single command cycle. In order to confirm the correctness of the derivations, we consider both discrete and continuous storage racks, and show that the expressions for expected travel times of discrete rack converge to those of continuous one. We also derive the expected travel times when the coordinate locations for storages or retrievals are triangularly distributed and we try to solve class layout problem using the obtained results. Numerical examples are given in case of 3-class-based storage policy.

• Journal of the Korean Operations Research and Management Science Society
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• 제26권1호
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• pp.71-85
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• 2001

This paper considers a cost model for a U-shaped manufacturing cell formation which incorporates a required number of machines and various material flows together under multi-part multi-cell environment. The model is required to satisfy both the specified operation sequence of each part and the total part demand volume, which are considered to derive material handling cost in U-shaped flow line cells. In the model several cost-incurring factors including set-up for batch change-over, processing time for operations of each part, and machine failures are also considered in association with processing load and capacity of each cell. Moreover, a heuristic for a good machine layout in each cell is newly proposed based on the material handling cost of each alternative sequence layout. These all are put together to present an efficient heuristic for the U-shaped independent-cell formation problem, numerical problems are solved to illustrate the algorithm.

• Proceedings of the KIEE Conference
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• 대한전기학회 1987년도 전기.전자공학 학술대회 논문집(II)
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• pp.1463-1466
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• 1987

The problem of generating minimal area CMOS functional cell layout can be converted to that of decomposing the transistor connection graph into a minimum number of subgraphs, each having a pair of Euler paths with the same sequence of input labels on the N-graph and P-graph, which are portions of the graph corresponding to NMOS and PMOS parts respectively. This paper proposes a heuristic algorithm which yields a nearly minimal number of Euler paths from the path representation formula which represents the give a logic function. Subpath merging is done through a list processing scheme where the pair of paths which results in the lowest cost is successively merged from all candidate merge pairs until no further path merging and further reduction of number of subgraphs are possible. Two examples were shown where we were able to further reduce the number of interlaces, i.e., the number of non-butting diffusion islands, from 3 to 2, and from 2 to 1, compared to the earlier work [1].

• Korean Journal of Computational Design and Engineering
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• 제16권3호
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• pp.207-215
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• 2011

Due to its large size, a ship is first divided into scores of blocks and then each block is constructed through various shops, such as the assembly shop, the painting shop, and the outfitting shop. However, each block may not be directly moved to the next shop and may be temporarily laid on a block stockyard because the working time in each shop is different. If blocks are laid on the block stockyard without any planning, the rearrangement of the blocks by a transporter are required because the blocks have the different in and out time. In this study, an optimal layout method based on the genetic algorithm was proposed in order to minimize the rearrangement of the blocks in the block stockyard. To evaluate the applicability of the proposed method, it was applied to a simple layout problem of the block stockyard.

• Journal of the Korean Institute of Telematics and Electronics C
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• 제35C권1호
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• pp.34-41
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• 1998

In this paper, I designed a P1394 serial bus chip as new bus interface architecture which can transmit the multimedia data at the rate of 400 Mbps and guarantee necessary bandwidth. because multimedia data become meaningless data after appropriate time, it is necessary to transfer multimedia data in real time, P1394 serial bus chip designed in this paper support isochronous transfer mode to solve this problem. Also, designed P1394 serial bus chip can transfer high quality video data or high quality audio data because it support the speed of 400 Mbps. While user must set device ID manually in previous interface such as SCSI, device ID is automatically determined if user connect each node with designed P1394 serial bus cable and power on. To design this chip, I verified the behavioral of the entrire system and synthesized layout. Also, I did layout the analog blocks and blocks which must be optimized in full custom.

• Proceedings of the IEEK Conference
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• 대한전자공학회 2002년도 ITC-CSCC -3
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• pp.1539-1542
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• 2002

In layout of LSI and PWB, block pack- ing problem is very important in order to reduce chip area. Sequence-pair is typical one of conventional pack- ing method and can search nearly-optimal solution by using Simulated Annealing(SA). SA takes huge computation time due to evaluating of various packing results. Therefore, Sequence-pair is not effective enough for fast layout evaluation including estimation of wire length and rotation of every blocks. This paper proposes an efficient block packing method to minimize wire length and chip area. Our method searches an optimal packing efficient- ly by using a cluster growth algorithm with changing the most valuable packing score on packing process.