• 한국생산제조학회지
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• 제23권4호
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• pp.355-360
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• 2014

Recently, the use of LED is increasing. This paper presents the new package process of thermal compression bonding using metal layered LED chip for the high power LED device. Effective thermal dissipation, which is required in the high power LED device, is achieved by eutectic/flip chip bonding method using metal bond layer on a LED chip. In this study, the process condition for the LED eutectic die bonder system is proposed by using the analysis program, and some experimental results are compared with those obtained using a DST (Die Shear Tester) to illustrate the reliability of the proposed process condition. The cause of bonding failures in the proposed process is also investigated experimentally.

• 대한토목학회논문집
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• 제42권2호
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• pp.257-261
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• 2022

건축물의 디자인 자유도 향상, 작업자 안전 향상, 비교적 쉬운 납기예측 등의 이점으로 건설 산업에 적용된 3D 프린팅 기술(Additive manufacturing, AM)은 각종 효과성의 검증과 산업적용이 진행되고 있다. 다만, 기존기술대비 낮은 성숙도로 인해, 건축AM기술의 전주기에 발생하는 새로운 문제들을 해소하기 위한 연구들이 진행 중이다. 본 논문에서는 이러한 문제점 중에서도 현장 환경에 건축물을 적층 시공하는 과정에서, 낮은 시공표면평탄이 적층 제조 형상물에 미치는 영향을 확인한다. 특히 레이저 스캐닝을 통한 3차원 재구성 및 정량 분석을 통해, 낮은 평탄도로 인한 불균일한 적층형상물을 분석하고, 이를 해소하기 위한 적층시공전략을 제안한다.

• 마이크로전자및패키징학회지
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• 제10권3호
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• pp.73-82
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• 2003

최근 인쇄회로기판(printed wiring board, PWB)은 마이크로 전자패키지분야에서 디자인 또는 제조측면에서 핵심기술로 인식되고 있다. PWB는 열적특성이 다른 여러 재료가 적층되어 있는 구조이고 제조공정을 지나는 동안에 각 층의 재료는 서로 다른 열팽창률을 나타나게 되어 워피지, 수축, 크기 등의 많은 불량을 발생시킨다. PWB의 열변형 특성은 제조공정 변수 중 솔더레지스트의 부피변화에 의하여 많은 영향을 받으므로 본 연구에서는 각각 2층, 4층 PBGA 및 CSP의 열변형 특성을 솔더레지스트 공정에 따라 분석하고자 하였다. 솔더레지스트의 부피분율이 30%이상일 경우, 2층 PWB의 열변형이 4층 PWB보다 최대 40%로 높게 측정되었다. 이와 같은 이유는 4L PWB는 고인성 특성을 지닌 프리프레그와 동박이 추가적으로 적층되어 있으므로 솔더레지스트의 열변형을 상쇄시키기 때문이다. 반면에 솔더레지스트의 부피분율이 30%이하일 경우, PWB의 층수 및 디자인에 관계없이 유사한 열변형 특성을 나타내었다.

• 한국소성가공학회:학술대회논문집
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• 한국소성가공학회 2004년도 추계학술대회논문집
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• pp.184-187
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• 2004

The sheet parts are formed with dies conventionally. But this conventional forming process is not suited to small volume and varied production for the reason of high cost. For the solution of this problem, a new forming process, which is called CNC incremental sheet forming, is being introduced. This process can form sheet parts without die, and is very well suited to small volume and varied production in space flight and automobile. In this paper, dieless CNC forming system based on a machining center is developed. A special device to grasp and pull the blank sheet built in the machining center and tool path generation S/W from STL file of 3-D model are developed. Several sheet parts are incrementally formed to verify the effectiveness of the developed system.

• 한국재료학회지
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• 제31권12호
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• pp.710-718
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• 2021

Recently, due to high theoretical capacitance and excellent ion diffusion rate caused by the 2D layered crystal structure, transition metal hydroxides (TMHs) have generated considerable attention as active materials in supercapacitors (or electrochemical capacitors). However, TMHs should be designed using morphological or structural modification if they are to be used as active materials in supercapacitors, because they have insulation properties that induce low charge transfer rate. This study aims to modify the morphological structure for high cycling stability and fast charge storage kinetics of TMHs through the use of nickel cobalt hydroxide [NiCo(OH)₂] decorated on nickel foam. Among the samples used, needle-like NiCo(OH)₂ decorated on nickel foam offers a high specific capacitance (1110.9 F/g at current density of 0.5 A/g) with good rate capability (1110.9 - 746.7 F/g at current densities of 0.5 - 10.0 A/g). Moreover, at a high current density (10.0 A/g), a remarkable capacitance (713.8 F/g) and capacitance retention of 95.6% after 5000 cycles are noted. These results are attributed to high charge storage sites of needle-like NiCo(OH)₂ and uniformly grown NiCo(OH)₂ on nickel foam surface.

• 대한전자공학회논문지SD
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• 제47권5호
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• pp.31-40
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• 2010

본 논문에서는 IEEE 802.11n 무선 랜 표준용 LDPC 복호기 프로세서를 설계하였다. 설계된 프로세서는 IEEE 802.11n 표준의 블록길이 1,944와 부호화율 1/2의 패리티 검사 행렬을 지원하며, 하드웨어 감소를 위해 최소합 알고리듬과 layered 구조를 적용하였다. 최소합 알고리듬의 특징을 이용한 검사노드 메모리 최소화 방법을 고안하여 적용하였으며, 이를 통해 기존방법의 메모리 크기의 25%만을 사용하여 구현하였다. 설계된 프로세서를 $0.35-{\mu}m$ CMOS 셀 라이브러리로 합성한 결과, 200,400 게이트와 19,400 비트의 메모리로 구현되었으며, 80 MHz@2.5V로 동작하여 약 135 Mbps의 성능을 갖는다. 설계된 회로는 FPGA 구현을 통해 하드웨어 동작 검증과 복호성능을 분석하였으며, 이를 통해 설계된 LDPC 복호기의 유용성을 입증하였다.

• 한국공작기계학회:학술대회논문집
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• 한국공작기계학회 2001년도 춘계학술대회 논문집(한국공작기계학회)
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• pp.275-280
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• 2001

Recently, the trends of industrial products grow more miniaturization, variety and mass production. Micro drilling which take high precision in cutting work is requested more micro hole and high speed working. Especially, Micro deep hole drilling is becoming more important in a wide spectrum of precision production industries, ranging from the production of automotive fuel injection nozzle, watch and camera parts, medical needles, and thick multi-layered Printed Circuit Boards(PCB) that are demanded for very high density electric circuitry. This paper shows the tool monitoring results of micro drill with tool dynamometer. And additionally, microscope with built-in monitor inspection show the relationship between burr in workpiece and chip form of micro drill machining.

• 한국재료학회지
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• 제22권7호
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• pp.335-341
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• 2012

Recently, the demand for the miniaturization of printed circuit boards has been increasing, as electronic devices have been sharply downsized. Conventional multi-layered PCBs are limited in terms their use with higher packaging densities. Therefore, a build-up process has been adopted as a new multi-layered PCB manufacturing process. In this process, via-holes are used to connect each conductive layer. After the connection of the interlayers created by electro copper plating, the via-holes are filled with a conductive paste. In this study, a desmear treatment, electroless plating and electroplating were carried out to investigate the optimum processing conditions for Cu via filling on a PCB. The desmear treatment involved swelling, etching, reduction, and an acid dip. A seed layer was formed on the via surface by electroless Cu plating. For Cu via filling, the electroplating of Cu from an acid sulfate bath containing typical additives such as PEG(polyethylene glycol), chloride ions, bis-(3-sodiumsulfopropyl disulfide) (SPS), and Janus Green B(JGB) was carried out. The desmear treatment clearly removes laser drilling residue and improves the surface roughness, which is necessary to ensure good adhesion of the Cu. A homogeneous and thick Cu seed layer was deposited on the samples after the desmear treatment. The 2,2'-Dipyridyl additive significantly improves the seed layer quality. SPS, PEG, and JGB additives are necessary to ensure defect-free bottom-up super filling.

• Steel and Composite Structures
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• 제49권4호
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• pp.361-380
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• 2023

A size dependent bending behavior of piezoelectrical flexoelectric layered perforated functionally graded (FG) composite nanobeam rested on an elastic foundation is investigated analytically. The composite beam is composed of regularly cutout FG core and two piezoelectric face sheets. The material characteristics is graded through the core thickness by power law function. Regular squared cutout perforation pattern is considered and closed forms of the equivalent stiffness parameters are derived. The modified nonlocal strain gradient elasticity theory is employed to incorporate the microstructure as well as nonlocality effects into governing equations. The Winkler as well as the Pasternak elastic foundation models are employed to simulate the substrate medium. The Hamiltonian approach is adopted to derive the governing equilibrium equation including piezoelectric and flexoelectric effects. Analytical solution methodology is developed to derive closed forms for the size dependent electromechanical as well as mechanical bending profiles. The model is verified by comparing the obtained results with the available corresponding results in the literature. To demonstrate the applicability of the developed procedure, parametric studies are performed to explore influences of gradation index, elastic medium parameters, flexoelectric and piezoelectric parameters, geometrical and peroration parameters, and material parameters on the size dependent bending behavior of piezoelectrically layered PFG nanobeams. Results obtained revealed the significant effects both the flexoelectric and piezoelectric parameters on the bending behavior of the piezoelectric composite nanobeams. These parameters could be controlled to improve the size dependent electromechanical as well as mechanical behaviors. The obtained results and the developed procedure are helpful for design and manufacturing of MEMS and NEMS.

• 한국정밀공학회지
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• 제16권1호통권94호
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• pp.95-107
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• 1999

The design models of a new product in general are created using clay models or wooden mock-ups. The reverse engineering(RE) technology enables us to quickly create the CAD model of the new product by capturing the surface of the model using laser digitizers or coordinate measuring machines. Rapid prototyping (RP) is another technology that can reduce the product development time by fabricating the physical prototype of a part using a layered manufacturing technique. In reverse engineering process, however, the digitizer generates an enormous amount of point data, and it is time consuming and also inefficient to create surfaces out of these data. In addition, the surfacing operation takes a great deal of time and skill and becomes a bottleneck. In rapid prototyping, a faceted model called STL file has been the industry standard for providing the CAD input to RP machines. It approximates the CAD model of a part using many planar triangular patches and has drawbacks. A novel procedure that overcomes these problems and integrates RE with RP is proposed. Algorithms that drastically reduce the point clouds data have been developed. These methods will facilitate the use of reverse engineered geometric data for rapid prototyping, and thereby will contribute in reducing the product development time.