• The Transactions of The Korean Institute of Electrical Engineers
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• v.64 no.2
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• pp.276-279
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• 2015

This paper propose a method to reduce the backscatter field of the curved aluminum plate using the cancellation system. The cancellation circuit is composed of a circulator, a LNA(Low Noise Amplifier), a VGA(Variable Gain Amplifier) and two phase shifters. Prior to experiment, we performed simulations to confirm the possibility using FDTD(Finite Difference Time Domain) simulator. We confirmed that the backscatter field could be reduced by the cancellation circuit when we changed the appropriate gain and phase. Finally, we performed an experiment to verify the performance of the cancellation circuit.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2001.11a
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• pp.222-226
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• 2001

In this paper, 2.4GHz RF Module using Even Harmonic Mixer(EHM) was designed and fabricated for Direct conversion(DC) system. By minimizing performance degradation of DC system with DC offset and LO radiation, the capability of minimization and one chip solution in wireless system was proposed. The designed EHM using anti-parallel diode pair represented 9dB conversion loss and about -60dBm 2LO leakage radiation in RF port, and output reflection and reverse transmission characteristic of low noise amplifier was improved. So superior DC offset suppression characteristic is expected. RF Module which consists of EHM, LNA, RF amplifier, Frequency synthesizer and Duplexer was designed and fabricated.

• Journal of Electrical Engineering and Technology
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• v.13 no.5
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• pp.2004-2010
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• 2018

We propose a small active antenna to receive Global Navigation Satellite System (GNSS) signals, i.e., Global Positioning System (GPS) L1 (1,575MHz) and Russian Global Navigation Satellite System (GLONASS) L1 (1,600 MHz) signals. A two-stage low-noise amplifier (LNA) with more than 27 dB gain is implemented in the bottom layer of a three-layer antenna package. In addition, a hybrid coupler is used to combine signals from pair of proximately coupled orthogonal feeds with $90^{\circ}$ phase difference to achieve the circular polarization (CP) characteristic. Three layers of high permittivity (${\varepsilon}_r=10$) substrates are stacked and effectively integrated to have a small dimension of $64mm{\times}64mm{\times}7.42mm$ (including both circuit and antenna). The reflection coefficient of the fabricated antenna at the target frequency is below -10 dB, the measured antenna gain is above 26 dBic and the measured noise figure is less than 1.4 dB.

• Journal of Digital Convergence
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• v.10 no.10
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• pp.313-318
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• 2012

In this study, we propose a low-noise transceiver for 10GHz motion sensor. The transceiver presented here has a circuit(Hittite HMC908LC5) that is composed of a two way-$0^{\circ}$ power splitter(the 1:2 block) and a $90^{\circ}$ Hybrid. The noise reduction circuit utilizes an LNA followed by an image reject mixer which is driven by an LO buffer amplifier. A modeling and analysis have been pursued using CST MWS. A prototype sensor was manufactured to measure the performance and experimental results show that the proposed sensor is good enough to use for a accurate motion sensor.

• Journal of IKEEE
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• v.14 no.4
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• pp.257-262
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• 2010

We design a CMOS front-end with wide variable gain and low power consumption for 5.25 GHz band. To obtain wide variable gain range, a p-type metal-oxide-semiconductor field-effect transistor (PMOS FET) in the low noise amplifier (LNA) section is connected in parallel. For a mixer, single balanced and folded structure is employed for low power consumption. Using this structure, the bias currents of the transconductance and switching stages in the mixer can be separated without using current bleeding path. The proposed front-end has a maximum gain of 33.2 dB with a variable gain range of 17 dB. The noise figure and third-order input intercept point (IIP3) are 4.8 dB and -8.5 dBm, respectively. For this operation, the proposed front-end consumes 7.1 mW at high gain mode, and 2.6 mW at low gain mode. The simulation results are performed using Cadence RF spectre with the Taiwan Semiconductor Manufacturing Company (TSMC) $0.18\;{\mu}m$ CMOS technology.)

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.11
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• pp.77-83
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• 2009

In this paper, a selective feedback low-noise amplifier (LNA) has been realized in a $0.18{\mu}m$ CMOS technology to cover a number of wireless multi-standards. By exploiting notch filter, the SF-LNA demonstrates the measured results of the power gain (S21) of 11.5~13dB and the broadband input/output impedance matching of less than -10dB within the frequency bands of 820~960MHz and 1.5~2.5GHz, respectively. The chip dissipates 15mW from a single 1.8V supply, and occupies the area of $1.17\times1.0mm^2$.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.1
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• pp.126-142
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• 2016

This paper presents a wide-frequency-range, low-power transceiver with an automatic impedance-matching calibration for TV-white-space (TVWS) application. The wide-range automatic impedance matching calibration (AIMC) is proposed for the Drive Amplifier (DA) and LNA. The optimal $S_{22}$ and $S_{11}$ matching capacitances are selected in the DA and LNA, respectively. Also, the Single Pole Double Throw (SPDT) switch is integrated to share the antenna and matching network between the transmitter and receiver, thereby minimizing the systemic cost. An N-path filter is proposed to reject the large interferers in the TVWS frequency band. The current-driven mixer with a 25% duty LO generator is designed to achieve the high-gain and low-noise figures; also, the frequency synthesizer is designed to generate the wide-range LO signals, and it is used to implement the FSK modulation with a programmable loop bandwidth for multi-rate communication. The TVWS transceiver is implemented in $0.13{\mu}m$, 1-poly, 6-metal CMOS technology. The die area of the transceiver is $4mm{\times}3mm$. The power consumption levels of the transmitter and receiver are 64.35 mW and 39.8 mW, respectively, when the output-power level of the transmitter is +10 dBm at a supply voltage of 3.3 V. The phase noise of the PLL output at Band 2 is -128.3 dBc/Hz with a 1 MHz offset.

• ETRI Journal
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• v.42 no.4
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• pp.549-561
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• 2020

We developed a 0.1-㎛ metamorphic high electron mobility transistor and fabricated a W-band monolithic microwave integrated circuit chipset with our in-house technology to verify the performance and usability of the developed technology. The DC characteristics were a drain current density of 747 mA/mm and a maximum transconductance of 1.354 S/mm; the RF characteristics were a cutoff frequency of 210 GHz and a maximum oscillation frequency of 252 GHz. A frequency multiplier was developed to increase the frequency of the input signal. The fabricated multiplier showed high output values (more than 0 dBm) in the 94 GHz-108 GHz band and achieved excellent spurious suppression. A low-noise amplifier (LNA) with a four-stage single-ended architecture using a common-source stage was also developed. This LNA achieved a gain of 20 dB in a band between 83 GHz and 110 GHz and a noise figure lower than 3.8 dB with a frequency of 94 GHz. A W-band image-rejection mixer (IRM) with an external off-chip coupler was also designed. The IRM provided a conversion gain of 13 dB-17 dB for RF frequencies of 80 GHz-110 GHz and image-rejection ratios of 17 dB-19 dB for RF frequencies of 93 GHz-100 GHz.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.17 no.10
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• pp.2273-2280
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• 2013

This article introduces the next-generation air surveillance system and investigates how to design of front-end low noise amplifier of the ground station receiver. In consideration of the international standard documentation and the performance of existing products, the study conducts the link budget on the entire system so that it can be competitive in terms of receive sensitivity or reliability. To obtain a proper low noise amplifier, standards of design are decided so that such factors as gain, gain flatness, and reflective loss can be optimal. In its design, the bias circuit appropriate for the characteristics of low power, low noise, or high gain was built, and according to the results of the simulation conducted after the optimal design, its gain was 16.24dB, noise factor was 0.36dB, input-output reflective loss was -18dB and -28dB each, and frequency stability was 1.11. According to the results measured after the design, its gain was 17dB, noise factor was 0.51dB, gain flatness was 0.23dB, and input-output reflective loss was -18.28dB and -24.50dB each, so the results gained were suitable for building the overall system.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.17 no.6 s.109
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• pp.597-604
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• 2006

An ultrawideband(UWB) $3.1{\sim}5.15$ GHz low-noise amplifier employing a novel input matching circuit and feedback topology are presented. The proposed UWB amplifier is Implemented in $0.18{\mu}m$ RF CMOS technology. Measurements show a NF of $3.4{\sim}3.9$ dB, a power gain of $12.8{\sim}14$ dB, better than -9.4 of input matching and, an input IP3 of -1 dBm, while comsuming only 14.5 mW of power.