• ETRI Journal
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• 제42권5호
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• pp.781-789
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• 2020

In this study, an E-band low-noise amplifier (LNA) monolithic microwave integrated circuit (MMIC) has been designed using silicon-germanium 130-nm bipolar complementary metal-oxide-semiconductor technology to suppress unwanted signal gain outside operating frequencies and improve the signal gain and noise figures at operating frequencies. The proposed impedance-controllable filter has series (R_s) and parallel (R_p) resistors instead of a conventional inductor-capacitor (L-C) filter without any resistor in an interstage matching circuit. Using the impedance-controllable filter instead of the conventional L-C filter, the unwanted high signal gains of the designed E-band LNA at frequencies of 54 GHz to 57 GHz are suppressed by 8 dB to 12 dB from 24 dB to 26 dB to 12 dB to 18 dB. The small-signal gain S₂₁ at the operating frequencies of 70 GHz to 95 GHz are only decreased by 1.4 dB to 2.4 dB from 21.6 dB to 25.4 dB to 19.2 dB to 24.0 dB. The fabricated E-band LNA MMIC with the proposed filter has a measured S₂₁ of 16 dB to 21 dB, input matching (S₁₁) of -14 dB to -5 dB, and output matching (S₂₂) of -19 dB to -4 dB at E-band operating frequencies of 70 GHz to 95 GHz.

• 한국통신학회논문지
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• 제19권5호
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• pp.872-882
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• 1994

본 논문에서는 통신위성중계기의 송, 수신 신호의 크기에 따른 안테나부의 시스템 특성으로 고려하여 대역통과여파기 형태의 이득특성을 갖는 저잡음증폭기를 설계, 제작하였다. 한 예로써, 위성통신용 수신주파수인 14.0~14.5GHz.에서 2단 저잡음증폭기와 4단 증폭기를 설계, 제작하였다. 제작된 2단 저잡음증폭기는 대역내에서 20.3dB +- 0.1dB의 이득, 1.44dB+-0.04dB의 잡음지수, 송신주파수 대역(12.25~12.75GHz)에서 14dB의 Rejection을 보여주었다 이 저잡음증폭기는 이득, 잡음지수, 군지연 특성면에서도 모두 설계치와 잘 일치하였다. 또한 제작된 4단 증폭기는 42dB 이상의 이득에 +-0.25dB 이내의 평탄도를 보여 주었고, 송신주파수 대역에서의 Rejection은 28dB로 측정되었다. 본 논문에서 제작된 협대역 저잡음 증폭기는 위와 같은 송신대역 Rejection 특성으로 인하여 중계기의 수신부 입력여파기와 주파수변환부내의 여파기의 설계 사양을 완화시키고 설계 및 제작비용을 낮출 수 있다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제11권3호
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• pp.198-206
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• 2011

This paper presents a new programmable compensation circuit (PCC) for a System-on-Chip (SoC). The PCC is integrated with $0.18-{\mu}m$ BiCMOS SiGe technology. It consists of RF Design-for-Testability (DFT) circuit, Resistor Array Bank (RAB) and digital signal processor (DSP). To verify performance of the PCC we built a 5-GHz low noise amplifier (LNA) with an on-chip RAB using the same technology. Proposed circuit helps it to provide DC output voltages, hence, making the RF system chain automatic. It automatically adjusts performance of an LNA with the processor in the SoC when it goes out of the normal range of operation. The PCC also compensates abnormal operation due to the unusual PVT (Process, Voltage and Thermal) variations in RF circuits.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2005년도 추계종합학술대회
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• pp.873-876
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• 2005

A low noise amplifier(LNA) using electro-magnetic field simulator is designed in standard 0.25um CMOS process. Integrated spiral inductor is simulated using EM field solver. Then LNA is simulated with active device, capacitor and simulated inductor by EM field solver. A S11 and S21 of -15.45dB and 17.8dB at 2.3GHz as simulation results was achieved. A Noise Figure is 2.92dB. And Measurements show a S11 and S21 of -12.4dB and 17.8dB at 2.3GHz. A Noise Figure of 3.3dB was achieved.

• 전자통신동향분석
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• 제16권1호통권67호
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• pp.56-70
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• 2001

마이크로파대 이상의 높은 RF 전파는 신호레벨이 비교적 작고 간섭현상에 매우 민감한 특성을 가지고 있다. 따라서 이러한 미소한 입력전파의 수신시 수신기 전체의 감도를 높이고 잡음을 저감시킬 목적으로 사용되는 고주파 증폭기가 저잡음 증폭기이다. 본 고에서는 LNA의 기본적 특성분석과 지능형교통시스템에 응용되는 5.8GHz대 단거리전용통신용 LNA를 구현하기 위한 기본 FET 증폭기의 전기적 특성을 연구하고 직렬 궤환에 의한 최소잡음과 최소 입력 정재파비의 최적 설계 파라미터를 도출하였다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제16권6호
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• pp.754-759
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• 2016

A transformer feedback low-noise amplifier (LNA) is implemented in a standard $0.18{\mu}m$ CMOS process, which exploits drain-to-gate transformer feedback technique for wideband input matching and operates across entire 3~5 GHz ultra-wideband (UWB). The proposed LNA achieves power gain above 9.5 dB, input return loss less than 15.0 dB, and noise figure below 4.8 dB, while consuming 8.1 mW from a 1.8-V supply. To the authors' knowledge, drain-to-gate transformer feedback for wideband input matching cascode LNA is the first adopted technique for UWB application.

• 한국정보통신설비학회:학술대회논문집
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• 한국정보통신설비학회 2009년도 정보통신설비 학술대회
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• pp.121-124
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• 2009

In this paper, the techniques and design focus of flexible gain coltrol of LAN(Low Noise Amplifier) using the TSMC 0.18um CMOS process. The design frequency set up a standard on 2.4GHz that is used in Zigbee system. The design concepts a basic Cascode LNA techniques and a swiching circuit consisted of 4 NMOS of load resistance, which convert the output impedenceby tuning on or off. The result show the gain change by NMOS operated swich. The simulation result is that Gain is 14.07dB-16.79dB and NF(Noise Figure) is 1.06dB-1.09dB.

• 한국ITS학회:학술대회논문집
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• 한국ITS학회 2006년도 제5회 추계학술대회 및 정기총회
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• pp.300-303
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• 2006

• 한국항행학회논문지
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• 제8권2호
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• pp.176-183
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• 2004

본 논문에서는 s-밴드에서 동작하는 2단 저잡음 증폭기를 설계 및 제작하였다. 소자는 HP사의 ATF54143 HEMT를 사용하였고, 양호한 잡음지수를 위한 정합회로 설계 시 좋지 않은 입력 정재파비를 동시에 고려하여, 원하는 잡음지수와 입력 정재파비를 얻도록 설계하였다. 측정 결과 이득은 27.8dB, 입력 정재파비와 출력 정재파비는 1.5를 넘지 않는 특성을 얻었다.

• 한국전자파학회:학술대회논문집
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• 한국전자파학회 2002년도 종합학술발표회 논문집 Vol.12 No.1
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• pp.16-20
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• 2002

This paper describes the resistive FET mixer with low IF for the 4-Ch DBF(Digital Beam Forming) receiver with LNA(Low Noise Amplifier). This DBF receiver based on the direct conversion method is generally suitable for high-speed wireless mobile communications. A radio frequency(RF), a local oscillator(LO) and an intermediate frequency(IF) considered in this research are 2.09 ㎓, 2.08 ㎓ and 10㎒, respectively. The RF input power, LO input power and Vgs are used -10㏈m, 6㏈m and -0.4 V, respectively. In the 4-Ch resistive FET mixer with LNA, the measured IF and harmonic components of 10㎒, 20㎒, 2.09㎓ and 4.17㎓ are about -12.5 ㏈m, -57㏈m, -40㏈m and -54㏈m, respectively. The IF output power observed at each channel of 10㎒ is about -12.5㏈m and it is higher 27.5 ㏈m than the maximum harmonic component of 2.09㎓. Each IF output spectrum of the 4-Ch is observed almost same value and it shows a good agreement with the prediction.