• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 하계학술대회 논문집 Vol.9
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• pp.241-241
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• 2008

Macrofore formation in silicon and other semiconductors using electrochemical etching processes has been, in the last years, a subject of great attention of both theory and practice. Its first reason of concern is new areas of macropore silicone applications arising from microelectromechanical systems processing (MEMS), membrane techniques, solar cells, sensors, photonic crystals, and new technologies like a silicon-on-nothing (SON) technology. Its formation mechanism with a rich variety of controllable microstructures and their many potential applications have been studied extensively recently. Porous silicon is formed by anodic etching of crystalline silicon in hydrofluoric acid. During the etching process holes are required to enable the dissolution of the silicon anode. For p-type silicon, holes are the majority charge carriers, therefore porous silicon can be formed under the action of a positive bias on the silicon anode. For n-type silicon, holes to dissolve silicon is supplied by illuminating n-type silicon with above-band-gap light which allows sufficient generation of holes. To make a desired three-dimensional nano- or micro-structures, pre-structuring the masked surface in KOH solution to form a periodic array of etch pits before electrochemical etching. Due to enhanced electric field, the holes are efficiently collected at the pore tips for etching. The depletion of holes in the space charge region prevents silicon dissolution at the sidewalls, enabling anisotropic etching for the trenches. This is correct theoretical explanation for n-type Si etching. However, there are a few experimental repors in p-type silicon, while a number of theoretical models have been worked out to explain experimental dependence observed. To perform ordered macrofore formaion for p-type silicon, various kinds of mask patterns to make initial KOH etch pits were used. In order to understand the roles played by the kinds of etching solution in the formation of pillar arrays, we have undertaken a systematic study of the solvent effects in mixtures of HF, N-dimethylformamide (DMF), iso-propanol, and mixtures of HF with water on the macrofore structure formation on monocrystalline p-type silicon with a resistivity varying between 10 ~ 0.01 $\Omega$ cm. The etching solution including the iso-propanol produced a best three dimensional pillar structures. The experimental results are discussed on the base of Lehmann's comprehensive model based on SCR width.

• Current Photovoltaic Research
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• 제1권1호
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• pp.69-72
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• 2013

Combined nano- and micro-wires (CNMWs) Si arrays were prepared using PR patterning and silver-assisted electroless etching. A $POCl_3$ doping process was applied to the fabrication of CNMWs solar cells. KOH solution was used to remove bundles in CNMWs and the etching time was varied from 30 to 240 s. The lowest reflectance of 3.83% was obtained at KOH etching time of 30 s, but the highest carrier lifetime of $354{\mu}s$ was observed after the doping process at 60 s. At the same etching time, a $V_{oc}$ of 574 mV, $J_{sc}$ of $28.41mA/cm^2$, FF of 74.4%, and Eff. of 12.2% were achieved in the CNMWs solar cell. CNMWs solar cells have potential for higher efficiency by improving the post-process and surface-rear side structure.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1994년도 하계학술대회 논문집 C
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• pp.1250-1253
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• 1994

(100), (110) and (111) Si wafers are etched by isotropic etching method, anisotropic etching method using KOH etchant and EPW etchant and combined two-step etching method to compare the results. Isotopic etching method is effective in fabrication of wedge-shaped tips, especially (110) Si. Anisotropic etching method of (100) Si using EPW etchant can fabricate sharp cone-shaped tips and isotropic etching after anisotropic etching of (100) Si can fabricate wedge-shaped tips.

• 한국산학기술학회:학술대회논문집
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• 한국산학기술학회 2000년도 추계학술대회
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• pp.185-193
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• 2000

이방성 습식 식각을 이용하여 멤브레인을 제작하기 위하여 KOH-IPA의 식각액을 사용하여 단결정 실리콘 기판을 이방성으로 식각을 하고, 각 용액에 대한 식각 특성을 관찰하였다. 식각률은 식각액의 온도와 농도에 의존하며, 패턴 형성 방향과 식각액의 농도에 따라 식각 형태가 다르게 나타났다. 패턴은 Primary Flat에 45°로 기울여 형성되었으며 20wt·% KOH 80℃ 이상에서는 U-groove, 그 이하의 온도와 농도에서는 V-groove 식각 형태를 관찰할 수 있었다. 각 면에 대한 식각률 차이에 의해서 생기는 Hillock은 온도와 농도가 높아짐에 따라 줄어들었고, 재식각을 퉁하여 현저하게 줄어듦을 알 수 있었다.

• Journal of Radiation Protection and Research
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• 제9권2호
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• pp.61-66
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• 1984

Cellulose nitrate 의 ${\alpha}$입자비적특성(粒子飛跡特性), 특(特)히 화학부식조건(化學腐蝕條件)에 따른 ${\alpha}$입자(粒子)의 비적직경(飛跡直徑)을 중심(中心)으로 연구(硏究)하였다. Cellulose nitrate의 KOH 용액부식(溶液腐蝕)때에는 동일(同一)한 부식조건하에(腐蝕條件下)에서 NaOH 경우보다 ${\alpha}$비적직경(飛跡直徑)이 약(約) 3배(培) 크게 나타났다. 그밖에 부식시간(腐蝕時間) 및 ${\alpha}$입자(粒子)의 에너지에 따른 비적직경(飛跡直徑)의 데이타를 얻었고, ${\alpha}$입자(粒子)의 조사조건(照射條件)이 같을 때 흘루언스율(率)(fluence rate)이 부식시간(腐蝕時間)에 무관(無關)함을 알았다.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2000년도 하계종합학술대회 논문집(2)
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• pp.68-71
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• 2000

In this paper, we have measured the oxygen contents by FTIR in silicon wafer various process technology(slicing, lapping, polishing). The measured data are also compared with the data of etching process(KOH, Bright etching). Also we have measured the surface morpology in backside silicon wafer after etching treatment and etch pit density due to OISF after 4 step high temperature annealing process with optical microscope.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2001년도 하계종합학술대회 논문집(2)
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• pp.237-240
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• 2001

In this paper, we have presented processing technique about wet etching for silicon membrane construction formation. In order to make selective etching of backside silicon wafer, we used Si$_3$N$_4$ layer by PECVD(Plasma Enhanced Chemical Vapor Deposition). We have measured the surface thickness in backside silicon wafer after anisortropic wet etching with KOH:distilled water solutions. Through this experiment, we acquired the etching rate for 1.29${\mu}{\textrm}{m}$/min. The average rough of Si-membrane frontside and backside was 0.26${\mu}{\textrm}{m}$, 0.90${\mu}{\textrm}{m}$, respectively.

• 한국재료학회:학술대회논문집
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• 한국재료학회 1996년도 재료학회 추계학술발표회
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• pp.148-148
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• 1996

• 마이크로전자및패키징학회지
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• 제11권4호
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• pp.81-86
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• 2004

메가소닉파을 이용하여 KOH 용액에서의 실리콘 이방성 습식 식각의 특성들을 개선하기 위한 새로운 방법에 관한 연구를 하였다. P형 6인치 실리콘 웨이퍼를 메가소닉파를 이용한 상태와 이용하지 않은 상태에서 식각 실험을 각각 수행하여 식각 특성들을 비교하였다. 메가소닉파는 식각균일도, 표면 조도 등과 같은 습식 식각의 특성들을 개선시키는 것으로 나타났다. 메가소닉파를 이용했을 때 식각 균일도는 전체 웨이퍼 표면의 ${\pm}1\%$ 이하이며, 메가소닉파를 이용하지 않았을 때는 ${\pm}20\%$이상이다. 식각 공정에 사용한 초기의 실리콘웨이퍼의 제곱 평균 표면 조도($R_{rms}$)는 0.23 nm이다. 자기 진동과 초음파 진동을 이용한 식각에서의 평균 표면 조도는 각각 566 nm, 66 nm로 보고 되었지만, 메가소닉파를 이용하여 $37{\mu}m$ 깊이로 식각한 경우 평균 표면 조도가 1.7nm임을 실험을 통하여 검증하였다. 이러한 결과는 메가소닉파를 이용한 식각 방법이 식각 균일도, 표면 평균 조도 등과 같은 식각 특성들을 개선시키는데 효과적인 방법임을 알 수 있다.

• 소성∙가공
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• 제13권4호
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• pp.326-333
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• 2004

The nanoprobe based on lithography, mainly represented by SPM based technologies, has been recognized as a potential application to fabricate the surface nanosctructures because of its operational versatility and simplicity. However, nanoprobe based on lithography itself is not suitable for mass production because it is time a consuming method and not economical for commercial applications. One solution is to fabricate a mold that will be used for mass production processes such as nanoimprint, PDMS casting, and others. The objective of this study is to fabricate the silicon stamper for PDMS casting process by a mastless fabrication technique using the combination of nano/micro machining by Nanoindenter XP and KOH wet etching. Effect of the Berkovich tip alignment on the deformation was investigated. Grooves were machined on a silicon surface, which has native oxide on it, by constant load scratch (CLS), and they were etched in KOH solutions to investigate chemical characteristics of the machined silicon surface. After the etching process, the convex structures was made because of the etch mask effect of the mechanically affected layer generated by nanoscratch. On the basis of this fact, some line patterns with convex structures were fabricated. Achieved groove and convex structures were used as a stamper for PDMS casting process.