• 전기학회논문지
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• 제58권5호
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• pp.989-993
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• 2009

Triple junction which consists of three media(electrode, insulator, and gas) should be considered in designing of high voltage equipments due to the electric field enhancement. In this paper, positive lightning impulse breakdown voltage is predicted based on the streamer theory for simplified insulator models and 72.5kV spacer with varying the triple junction geometry and gas pressure, and the results are compared to the experimental results. The electric field coefficient concept is also applied in order to evaluate the partial discharge inception voltage and the surface flashover voltage from the streamer inception voltage. The application of this method using the constant electric field coefficient of 1.3 and 0.66 is possible for evaluating the triple-junction insulation of the simplified insulator and the 72.5kV spacer respectively. The error rate is under 10%.

• 한국전기전자재료학회논문지
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• 제27권9호
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• pp.594-599
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• 2014

The heat dissipation conditions of high-power 5 watt LEDs-based searchlight modules were optimized with varying LED bar'shape, materials, and ambient temperature. The LED junction temperature was estimated by using Computational Fluid Dynamics simulation. The optimal heat dissipation conditions were found as follows; LED bar' shape: L=80 mm, W=4 mm, t=10 mm, copper material, LED junction temperature of $116.6^{\circ}C$, ambient temperature of $50^{\circ}C$, total mass of 184 g, and shadowing area of $320mm^2$. The difference between the junction temperatures of our fabricated and simulated LEDs-based searchlight modules is about $3^{\circ}C$, which confirms the validity of our thermal simulation results.

• 한국전기전자재료학회논문지
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• 제32권2호
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• pp.104-109
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• 2019

An analytical threshold voltage model is proposed to analyze the threshold voltage roll-off and drain-induced barrier lowering (DIBL) for a junction-based double-gate (JBDG) MOSFET and a junction-less double-gate (JLDG) MOSFET. We used the series-type potential distribution function derived from the Poisson equation, and observed that it is sufficient to use n=1 due to the drastic decrease in eigenvalues when increasing the n of the series-type potential function. The threshold voltage derived from this threshold voltage model was in good agreement with the result of TCAD simulation. The threshold voltage roll-off of the JBDG MOSFET was about 57% better than that of the JLDG MOSFET for a channel length of 25 nm, channel thickness of 10 nm, and oxide thickness of 2 nm. The DIBL of the JBDG MOSFET was about 12% better than that of the JLDG MOSFET, at a gate metal work-function of 5 eV. It was also found that decreasing the work-function of the gate metal significantly reduces the DIBL.

• Anatomy and Cell Biology
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• 제56권3호
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• pp.342-349
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• 2023

This study was conducted to investigate the clinical and anatomical importance of the relevant region from the perspective of surgical approaches by determining the morphometric analysis of the craniocervical junction and foramen magnum (FM) region and determining their distances from important anatomical points. This research was carried out with 59 skulls found at the Anatomy Laboratories of Erciyes and Ankara Medipol University. Metric measurements of FM and condyle, FM shape, condyle-fossa relationship, and pharyngeal tubercle (PT) were made in mm-based dry bone samples of unknown age and sex. The distance between the anterior notches and the FM was 87.01±4.35, the distance between the anterior notches and the PT was 77.70±4.24, the distance between the PT-sphenooccipital junction was 13.23±2.42, and the FM index was 81.86±7.47. The anteroposterior and transverse lengths of FM were determined as 33.80±2.99 and 27.72±2.30, respectively. The morphometric and morphological data available regarding the craniocervical junction showed significant differences between populations. Comprehensive knowledge of this topic will provide a better approach to treat Arnold Chiari Malformation, FM meningiomas, and other posterior cranial fossa lesions. Therefore, we believe that FM and craniocervical junction morphology will be a guide not only for anatomists, but also for radiologists, neurosurgeons, ENT surgeons, and orthopedists.

• Applied Science and Convergence Technology
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• 제24권3호
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• pp.53-59
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• 2015

The field-effect transistors (FETs) with a graphene-based p-n junction channel were fabricated using the patterned self-assembled monolayers (SAMs). The self-assembled 3-aminopropyltriethoxysilane (APTES) monolayer deposited on $SiO_2$/Si substrate was patterned by hydrogen plasma using selective coating poly-methylmethacrylate (PMMA) as mask. The APTES-SAMS on the $SiO_2$ surface were patterned using selective coating of PMMA. The APTES-SAMs of the region uncovered with PMMA was removed by hydrogen plasma. The graphene synthesized by thermal chemical vapor deposition was transferred onto the patterned APTES-SAM/$SiO_2$ substrate. Both p-type and n-type graphene on the patterned SAM/$SiO_2$ substrate were fabricated. The graphene-based p-n junction was studied using Raman spectroscopy and X-ray photoelectron spectroscopy. To implement low voltage operation device, via ionic liquid ($BmimPF_6$) gate dielectric material, graphene-based p-n junction field effect transistors was fabricated, showing two significant separated Dirac points as a signature for formation of a p-n junction in the graphene channel.

• JSTS:Journal of Semiconductor Technology and Science
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• 제17권1호
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• pp.156-161
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• 2017

This work presents a novel structure for junction-less tunneling field effect transistor (JL-TFET) with a floating gate over the source region. Introduction of floating gate instead of fixed metal gate removes the limitation of fabrication process suitability. The proposed device is based on a heavily n-type-doped Si-channel junction-less field effect transistor (JLFET). A floating gate over source region and a control-gate with optimized metal work-function over channel region is used to make device work like a tunnel field effect transistor (TFET). The proposed device has exhibited excellent ID-VGS characteristics, ION/IOFF ratio, a point subthreshold slope (SS), and average SS for optimized device parameters. Electron charge stored in floating gate, isolation oxide layer and body doping concentration are optimized. The proposed JL-TFET can be a promising candidate for switching performances.

• Bulletin of the Korean Chemical Society
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• 제35권3호
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• pp.731-736
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• 2014

An organic junction transistor with a vertical structure based on an active layer of poly(3-hexylthiophene) was fabricated by facile micro-contact printing combined with the Langmuir-Schaefer technique, without conventional e-beam or photo-lithography. Direct printing and subsequent annealing of Au-nanoparticles provided control over the thickness of the Au electrode and hence control of the electrical contact between the Au electrode and the active layer, ohmic or Schottky. The junction showed similar current-voltage characteristics to an NPN-type transistor. Current through the emitter was simply controllable by the base voltage and a high transconductance of ~0.2 mS was obtained. This novel fabrication method can be applied to amplifying or fast switching organic devices.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2002년도 하계학술대회 논문집
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• pp.206-209
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• 2002

With the progress of semiconductor processing technology, avalanohe photodiodes (APDs) based on InP/InGaAs are used for high-speed optical receiver modules. Planar-type APDs give higher reliability than mesa-type APDs. However, Planar-type APDs are struggled with a problem of intensed electric field at the junction curvature, which causes edge breakdown phenomena at the junction periphery. In this paper, we focused on studying the effects of junction curvature for APDs performances by different etching processes followed by single diffusion to from p-n junction. The performance of each process is characterized by observing electric field profiles and carrier generation rates. From the results, it can be understood to predict the optimum structure, which can minimize edge breakdown and improve the manufacturability.

• 센서학회지
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• 제20권4호
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• pp.230-233
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• 2011

In this paper, highly-efficient optical gating in a junction device based on vanadium dioxide($VO_2$) thin film grown by a sol-gel method was investigated as a gate terminal of a three-terminal device using infrared light with a wavelength of ~1554.6 nm. Due to the photoinduced phase transition, the threshold voltage of the $VO_2$ junction device, at which the device current abruptly jumps, could be tuned with a sensitivity of ~96.5 V/W by adjusting the optical power of the infrared light directly illuminating the device. Compared with the tuning efficiency of the previous device fabricated using $VO_2$ thin film deposited by a pulsed laser deposition method, the threshold voltage of this device could be tuned by ~76.8 % at an illumination power of ~39.8 mW resulting in a tuning efficiency of ~1.930 %/mW, which is ~4.9 times larger than the previous device.

• Journal of Electrical Engineering and Technology
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• 제9권3호
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• pp.964-969
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• 2014

In Super Junction MOSFET, Charge Balance is the most important issue of the trench filling Super Junction fabrication process. In order to achieve the best electrical characteristics, the N type and P type drift regions must be fully depleted when the drain bias approaches the breakdown voltage, called Charge Balance Condition. In this paper, two methods from the fabrication process were used at the Charge Balance condition: Trench angle decreasing process and Bottom implantation process. A lower on-resistance could be achieved using a lower trench angle. And a higher breakdown voltage could be achieved using the bottom implantation process. The electrical characteristics of manufactured discrete device chips are compared with those of the devices which are designed of TCAD simulation.