Journal of the Korean Institute of Electrical and Electronic Material Engineers (한국전기전자재료학회논문지)

The Korean Institute of Electrical and Electronic Material Engineers (한국전기전자재료학회)
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Analysis of Threshold Voltage Roll-Off and Drain Induced Barrier Lowering in Junction-Based and Junctionless Double Gate MOSFET

접합 및 무접합 이중게이트 MOSFET에 대한 문턱전압 이동 및 드레인 유도 장벽 감소 분석

  • Jung, Hak Kee (Department of Electronic Engineering, Kunsan National University)
  • Received : 2018.10.31
  • Accepted : 2018.12.03
  • Published : 2019.03.01
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Abstract

An analytical threshold voltage model is proposed to analyze the threshold voltage roll-off and drain-induced barrier lowering (DIBL) for a junction-based double-gate (JBDG) MOSFET and a junction-less double-gate (JLDG) MOSFET. We used the series-type potential distribution function derived from the Poisson equation, and observed that it is sufficient to use n=1 due to the drastic decrease in eigenvalues when increasing the n of the series-type potential function. The threshold voltage derived from this threshold voltage model was in good agreement with the result of TCAD simulation. The threshold voltage roll-off of the JBDG MOSFET was about 57% better than that of the JLDG MOSFET for a channel length of 25 nm, channel thickness of 10 nm, and oxide thickness of 2 nm. The DIBL of the JBDG MOSFET was about 12% better than that of the JLDG MOSFET, at a gate metal work-function of 5 eV. It was also found that decreasing the work-function of the gate metal significantly reduces the DIBL.

Keywords

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Fig. 1. Schematic cross sectional diagram of double gate (DG) MOSFET.

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Fig. 2. Eigenvalue λn under given conditions. We show the value of sinh (πLg/λn), denominator of potential distribution function.

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Fig. 3. Comparison of threshold voltage roll-offs for this model and TCAD simulation [3] under given conditions. The line and dots denote results of this model and TCAD, respectively.

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Fig. 4. Comparison of threshold voltage roll-offs for JBDG MOSFET (Na = 5 × 1019 / cm3 ), undoped channel DGMOSFET, and JLDGMOSFET (Nd = 5 × 1019 / cm3 ) at (a) Vds = 0.1 V and (b) Vds = 1.0 V .

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Fig. 5. Threshold voltage roll-offs for doping concentraion (a) with channel thickness as a parameter and (b) with oxide thickness as a parameter under given conditions.

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Fig. 6. DIBLs for doping concentration under given conditions at channel length of 25 nm with silicon and oxide thickness as parameters.

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Fig. 7. DIBLs for doping concentration under given conditions at channel length of 25 nm with gate workfunction as a parameter.

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