• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.23 no.6
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• pp.449-453
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• 2010

In this paper, the electrical characteristics of Fin-type SONOS(silicon-oxide-nitride-oxide-silicon) flash memory device with different trapping layers are analyzed in depth. Two kinds of trapping layers i.e., silicon nitride($Si_3N_4$) and hafnium oxide($HfO_2$) are applied. Compared to the conventional Fin-type SONOS device using the $Si_3N_4$ trapping layer, the Fin-type SOHOS(silicon-oxide-high-k-oxide-silicon) device using the $HfO_2$ trapping layer shows superior program/erase speed. However, the data retention properties in SOHOS device are worse than the SONOS flash memory device. Degraded data retention in the SOHOS device may be attributed to the tunneling leakage current induced by interface trap states, which are supported by the subthreshold slope and low frequency noise characteristics.

• Journal of the Korean Vacuum Society
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• v.11 no.4
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• pp.230-234
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• 2002

Metal-ferroelectric-semiconductor(MFS) capacitors by using rapid thermal annealed $LiNbO_3$/Si structures were successfully fabricated and demonstrated nonvolatile memory operations of the MFS capacitors. The C-V characteristics of MFS capacitors showed a hysteresis loop due to the ferroelectric nature of the $LiNbO_3$thin film. The dielectric constant of the $LiNbO_3$film calculated from the capacitance in the accumulation region in the capacitance-voltage(C-V) curve was about 25. The gate leakage current density of MFS capacitor using a platinum electrode showed the least value of $1{\times}10^{-8}\textrm{A/cm}^2$ order at the electric field of 500 kV/cm. The minimum interface trap density around midgap was estimated to be about $10^{11}/cm^2$.eV. The typical measured remnant polarization(2Pr) value was about 1.2 $\mu\textrm{C/cm}^2$, in an applied electric field of $\pm$ 300 kv/cm. The ferroelectric capacitors showed no polarization degradation up to about $10^{10}$ switching cycles when subjected to symmetric bipolar voltage pulse in the 500 kHz.

• Journal of Information Display
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• v.12 no.4
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• pp.209-212
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• 2011

The threshold voltage shift (${\Delta}V_{th}$) under positive-voltage bias stress (PBS) of InGaZnO (IGZO) thin-film transistors (TFTs) annealed at different temperatures in air was investigated. The dramatic degradation of the electrical performance was observed at the sample that was annealed at $700^{\circ}C$. The degradation of the saturation mobility (${\mu}_{sat}$) resulted from the diffusion of indium atoms into the interface of the IGZO/gate insulator after crystallization, and the degradation of the subthreshold slope (S-factor) was due to the increase in the interfacial and bulk trap density. In spite of the degradation of the electrical performance of the sample that was annealed at $700^{\circ}C$, it showed a smaller ${\Delta}V_{th}$ under PBS conditions for $10^4$ s than the samples that were annealed at $500^{\circ}C$, which is attributed to the nanocrystal-embedded structure. The sample that was annealed at $600^{\circ}C$ showed the best performance and the smallest ${\Delta}V_{th}$ among the fabricated samples with a ${\mu}_{sat}$ of $9.38cm^2/V$ s, an S-factor of 0.46V/decade, and a ${\Delta}V_{th}$ of 0.009V, which is due to the passivation of the defects by high thermal annealing without structural change.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.07a
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• pp.358-361
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• 2002

Self-aligned MOSFETS using a polysilicon gate are widely fabricated in silicon technology. The polysilicon layer acts as a mask for the source and drain implants and does as gate electrode in the final product. However, the usage of polysilicon gate as a self-aligned mask is restricted in fabricating SiC MOSFETS since the following processes such as dopant activation, ohmic contacts are done at the very high temperature to attack the stability of the polysilicon layer. A metal instead of polysilicon can be used as a gate material and even can be used for ohmic contact to source region of SiC MOSFETS, which may reduce the number of the fabrication processes. Co-formation process of metal-source/drain ohmic contact and gate has been examined in the 4H-SiC based vertical power MOSFET At low bias region (<20V), increment of leakage current after RTA was detected. However, the amount of leakage current increment was less than a few tens of ph. The interface trap densities calculated from high-low frequency C-V curves do not show any difference between w/ RTA and w/o RTA. From the C-V characteristic curves, equivalent oxide thickness was calculated. The calculated thickness was 55 and 62nm for w/o RTA and w/ RTA, respectively. During the annealing, oxidation and silicidation of Ni can be occurred. Even though refractory nature of Ni, 950$^{\circ}C$ is high enough to oxidize it. Ni reacts with silicon and oxygen from SiO$_2$ 1ayer and form Ni-silicide and Ni-oxide, respectively. These extra layers result in the change of capacitance of whole oxide layer and the leakage current

• Proceedings of the KIEE Conference
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• 1998.07d
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• pp.1352-1354
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• 1998

$LiNbO_3$ transistor showed relatively stable characteristic, low interface trap density, and large remanent polarization. This paper reports ferroelectric $LiNbO_3$ thin films grown directly on p-type Si(100) substrates by 13.56 MHz rf magnetron sputtering system for FRAM applications. To take advantage of low temperature requirement for growing films, we deposited $LiNbO_3$ films lower than $300 ^{\circ}C$. RTA(Rapid Thermal Anneal) treatment was performed for as-deposited films in an oxygen atmosphere at $600^{\circ}C$ for 60 sec. We learned from X-ray diffraction that the RTA annealed films were changed from amorphous to poly-crystalline $LiNbO_3$ which exhibited (012), (015), and (022) orientations. The I-V characteristics of $LiNbO_3$ films before and after anneal treatment showed that RTA improved the leakage current of films. The leakage current density of films decreased from $10^{-5}$ to $10^{-7} A/cm^2$ at room temperature measurement. Breakdown electric field of the films exhibited higher than 500 kV/cm. The C-V curves showed the clockwise hysteresis represents ferroelectric switching characteristics. From C-V curves, we calculated dielectric constant of thin film $LiNbO_3$ as 27.5 which is close to that of bulk value.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.7
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• pp.21-29
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• 2004

Hot carrier degradation characteristics of Nano-scale CMOSFETs with dual gate oxide have been analyzed in depth. It is shown that, PMOSFET lifetime dominate the device lifetime than NMOSFET In Nano-scale CMOSFETs, that is, PMOSFET lifetime under CHC (Channel Hot Carrier) stress is much lower than NMOSFET lifetime under DAHC (Dram Avalanche Hot Carrier) stress. (In case of thin MOSFET, CHC stress showed severe degradation than DAHC for PMOSFET and DAHC than CHC for NMOSFET as well known.) Therefore, the interface trap generation due to enhanced hot hole injection will become a dominant degradation factor in upcoming Nano-scale CMOSFET technology. In case of PMOSFETs, CHC shows enhanced degradation than DAHC regardless of thin and thick PMOSFETs. However, what is important is that hot hole injection rather than hot electron injection play a important role in PMOSFET degradation i.e. threshold voltage increases and saturation drain current decreases due to the hot carrier stresses for both thin and thick PMOSFET. In case of thick MOSFET, the degradation by hot carrier is confirmed using charge pumping current method. Therefore, suppression of PMOSFET hot carrier degradation or hot hole injection is highly necessary to enhance overall device lifetime or circuit lifetime in Nano-scale CMOSFET technology

• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.6
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• pp.581-588
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• 2013

This paper presents a study of the process temperature dependence of $Al_2O_3$ film grown by thermal atomic layer deposition (ALD) as a passivation layer in the crystalline Si (c-Si) solar cells. The deposition rate of $Al_2O_3$ film maintained almost the same until $250^{\circ}C$, but decreased from $300^{\circ}C$. $Al_2O_3$ film deposited at $250^{\circ}C$ was found to have the highest negative fixed oxide charge density ($Q_f$) due to its O-rich condition and low hydroxyl group (-OH) density. After post-metallization annealing (PMA), $Al_2O_3$ film deposited at $250^{\circ}C$ had the lowest slow and fast interface trap density. Actually, $Al_2O_3$ film deposited at $250^{\circ}C$ showed the best passivation effects, that is, the highest excess carrier lifetime (${\tau}_{PCD}$) and lowest surface recombination velocity ($S_{eff}$) than other conditions. Therefore, $Al_2O_3$ film deposited at $250^{\circ}C$ exhibited excellent chemical and field-effect passivation properties for p-type c-Si solar cells.

• Journal of the Korean Vacuum Society
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• v.7 no.4
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• pp.341-347
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• 1998

We analyzed photoreflectance (PR) characterization of the $Al_xGa_{1-x}As$ epilayer grown by molecular beam epitaxy (MBE) method. The band-gap energy $(E_0)$ satisfying low power Franx-Keldysh (LPFK) due to GaAs buffer layer is 1.415 eV, interface electricall field $(E_i)$ is 1.05$\times$$10^4$V/cm, carrier concentration (N) is $1.3{\times}10^{15}\textrm{cm}^{-3}$. In PR spectrum intensity analysis at 300 K the $A^*$ peak below $(E_0)$ signal is low and distorted because of residual impurity in sample growth. The trap characteristic time ${\tau}_i$ of GaAs buffer layer is about 0.086 ms, and two superposed PR signal near 1.42eV consist of the third derivative signal of chemically eteched GaAs substrate and Franz-Keldysh oscillation (FKO) signal due to GaAs buffer layer.

• Mass Spectrometry Letters
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• v.4 no.2
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• pp.30-33
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• 2013

Chalcones are naturally occurring, biologically active molecules generating interest from a wide range of research applications including synthetic methodology development, biological activity investigation and studying fragmentation patterns. In this article, a series of chalcones has been synthesized and their fragmentation behavior was studied using modern ambient ionization technique Direct Analysis in Real Time (DART). DART ion source connected with an ion trap mass spectrometer was used for the fragmentation of various substituted chalcones. The chalcones were introduced to the DART source using a glass capillary without sample preparation step. All the chalcones showed prominent molecular ion peaks $[M]^{{\cdot}+}$ corresponding to the structures. Multistage mass spectral data $MS^n$ ($MS^2$ and $MS^3$) were collected for all the chalcones studied. The chalcones with substitutions at 3, 4 or 5 positions gave product ion peaks with the loss of a phenyl radical ($Ph^{\cdot}$) by radical initiated ${\alpha}$-cleavage, while substitution at 2 position of chalcone in the A-ring gave a product ion peak with the loss of substituted styryl radical (PhCH = $CH^{\cdot}$). In case of the chalcones with the substituent at 4 positions in A and B rings gave both types of fragmentation patterns. In conclusion, chalcones can be easily characterized using modern DART interface in very short time and efficiently without any cumbersome sample pretreatment.

• Journal of the Korean Ceramic Society
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• v.37 no.2
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• pp.186-193
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• 2000

Effects of 1.0 mol% CoO addition on sintering and the electrical properties of ZnO-Bi2O3-Sb2O3(ZBS) varistor system with 3.0 mol% co-addition of Sb2O3 and Bi2O3 at various Sb/Bi ratio (0.5, 1.0, and 2.0) were investigated. Cobalt had little influence on the liquid-phase formation and the pyrochlore decomposition temepratures of ZBS, while densification was mainly dependent on Sb/Bi ratio: when Sb/Bi=0.5, excess Bi2O3 irrelevant to the formation of pyrochore(Zn2Sb3Bi3O14) forms eutectic liquid at ~75$0^{\circ}C$ which promotes densification and grain growth; with Sb/Bi=2.0, the second phase Zn7Sb2O12 formed by excess Sb2O3 irrelevant to the formation of the pyrochlore retards densification up to ~100$0^{\circ}C$. These phases caused the coarsening and uneven distribution of the second phase particles on the grain boundaries of ZnO above the pyrochlore decomposition temperature(~105$0^{\circ}C$), which led to broad size dist-ribution of ZnO; the specimen with Sb/Bi=1.0 showed homogeneous microstructure compared with the others, which enabled improved varistor characteristics. Doping of Co increased the nonlinearity and the potential barrier height of ZBS, which is thought to stem from improved sintering behavior such as homogenized microstructure due to size reduction and even distribution of the second phase and suppressed volatility of Bi2O3, as well as the improvement in the potential barrier structure via increased donor and interface electron trap densities.