Journal of the Korean Institute of Electrical and Electronic Material Engineers (한국전기전자재료학회논문지)

The Korean Institute of Electrical and Electronic Material Engineers (한국전기전자재료학회)
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Analysis of Fin-Type SOHOS Flash Memory using Hafnium Oxide as Trapping Layer

Hafnium Oxide를 Trapping Layer로 적용한 Fin-Type SOHOS 플래시 메모리 특성연구

  • Park, Jeong-Gyu (Department of Electronics Engineering, Chungnam National University) ;
  • Oh, Jae-Sub (Nano Patterning Process Team, National Nanofab Center) ;
  • Yang, Seung-Dong (Department of Electronics Engineering, Chungnam National University) ;
  • Jeong, Kwang-Seok (Department of Electronics Engineering, Chungnam National University) ;
  • Kim, Yu-Mi (Department of Electronics Engineering, Chungnam National University) ;
  • Yun, Ho-Jin (Department of Electronics Engineering, Chungnam National University) ;
  • Han, In-Shik (Department of Electronics Engineering, Chungnam National University) ;
  • Lee, Hi-Deok (Department of Electronics Engineering, Chungnam National University) ;
  • Lee, Ga-Won (Department of Electronics Engineering, Chungnam National University)
  • 박정규 (충남대학교 전자전파정보통신공학과) ;
  • 오재섭 (나노종합팹센터 나노패턴팀) ;
  • 양승동 (충남대학교 전자전파정보통신공학과) ;
  • 정광석 (충남대학교 전자전파정보통신공학과) ;
  • 김유미 (충남대학교 전자전파정보통신공학과) ;
  • 윤호진 (충남대학교 전자전파정보통신공학과) ;
  • 한인식 (충남대학교 전자전파정보통신공학과) ;
  • 이희덕 (충남대학교 전자전파정보통신공학과) ;
  • 이가원 (충남대학교 전자전파정보통신공학과)
  • Received : 2010.05.10
  • Accepted : 2010.05.20
  • Published : 2010.06.01
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Abstract

In this paper, the electrical characteristics of Fin-type SONOS(silicon-oxide-nitride-oxide-silicon) flash memory device with different trapping layers are analyzed in depth. Two kinds of trapping layers i.e., silicon nitride($Si_3N_4$) and hafnium oxide($HfO_2$) are applied. Compared to the conventional Fin-type SONOS device using the $Si_3N_4$ trapping layer, the Fin-type SOHOS(silicon-oxide-high-k-oxide-silicon) device using the $HfO_2$ trapping layer shows superior program/erase speed. However, the data retention properties in SOHOS device are worse than the SONOS flash memory device. Degraded data retention in the SOHOS device may be attributed to the tunneling leakage current induced by interface trap states, which are supported by the subthreshold slope and low frequency noise characteristics.

Keywords

References

  1. Y. S. Shin, M. Div, and S. E. Co, VLSI Circuits, Symposium on VLSI Symp. Tech. Dig. (VLSI, Kyoto, Japan, 2005), p. 156.
  2. H. J. Park, S. J. Park, D. W. Nam, B. C. Kim, and K. Y. Seo, J. KIEEME 13, 914 (2000).
  3. T. H. Hsu, H. T. Lue, S. C. Lai, Y. C. King, K. Y. Hsieh, R. Liu, and C. Y. Lu, VLSI Technology, Systems, and Applications (VLSI, Taiwan, 2009) p. 154.
  4. T. H. Hsu, H. T. Lue, Y. C. King, J. Y. Hsieh, K. Y. Hsieh, R. Liu, and C. Y. Lu, IEEE Electron. Device Lett. 28, (2007).
  5. G. Zhang, X. P. Wang, W. J. Yoo, and M. F. Li, IEEE Trans. Electron. Devices 54, 3317 (2007). https://doi.org/10.1109/TED.2007.908888
  6. F. Hofmann, M. Specht, U. Dorda, R. Kommling, L. Dreeskornfeld, J. Kretz, M. Stadele, W. Rosner, and L. Risch, Solid-State Electron. 49, 1799 (2005). https://doi.org/10.1016/j.sse.2005.10.012
  7. I. H. Cho, T. S. Park, S. Y. Choi, J. D. Lee, and J. H. Lee, Technical Digest of Device Research Conference 2003 (IEEE, Salt Lake City, 2003) p. 133.
  8. S. Maikap, H. Y. Lee, T. Y. Wang, P. J. Tzeng, C. C. Wang, L. S. Lee, K. C. Liu, J. R. Yang, and M. J. Tsai, Semicond. Sci. Technol. 22, 884 (2007). https://doi.org/10.1088/0268-1242/22/8/010
  9. T. Park, S. Choi, D. H. Lee, J. R. Yoo, B. C. Lee, J. Y. Kim, C. G Lee, K. K. Chi, S. H. Hay, S. J. Hvun. Y. G. Shin. J. N. Han. I. S. Park. U I. Chune. J. T. Moon, E. Yoon, and J. H. Lee, Symposium on VLSl Symp. Tech. Dig. (VLSI, Kyoto, Japan, 2003)p. 135.
  10. O. Renault, D. Samour, D. Rouchon, P. Holliger, A. M. Papon, D. Blin, and S. Marthon, Thin Solid Films 428, 190 (2003). https://doi.org/10.1016/S0040-6090(02)01198-7
  11. John Robertson, Rep. on Prog. in Phys. 69, 327(2006). https://doi.org/10.1088/0034-4885/69/2/R02