• JSTS:Journal of Semiconductor Technology and Science
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• v.1 no.3
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• pp.158-166
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• 2001

Based on uniform hot carrier injection (optically assisted electron injection) across the $Si-SiO_2$ interface into the gate insulator of n-channel IGFETs, the threshold voltage shifts associated with electron injection of $1.25{\times}l0^{16}{\;}e/\textrm{cm}^2 between 0.5 and 7 MV/cm were found to decrease from positive to negative values, indicating both a decrease in trap cross section ($E_{ox}{\geq}1.5 MV/cm$) and the generation of FPC $E_{ox}{\geq}5{\;}MV/cm$). It was also found that FNC and large cross section NETs were generated for $E_{ox}{\geq}5{\;}MV/cm$. Continuous, uniform low-field (1MV/cm) electron injection up to $l0^{19}{\;}e/\textrm{cm}^2 is accompanied by a monatomic increase in threshold voltage. It was found that the data could be modeled more effectively by assuming that most of the threshold voltage shift could be ascribed to generated bulk defects which are generated and filled, or more likely, generated in a charged state. The injection method and conditions used in terms of injection fluence, injection density, and temperature, can have a dramatic impact on what is measured, and may have important implications on accelerated lifetime measurements.

• Journal of the Microelectronics and Packaging Society
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• v.15 no.4
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• pp.25-29
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• 2008

Reliability and performance in metal gate/high-k device with multiple gate dielectrics were investigated. MOSFETs with a thin $HfSiO_x$ layer on a thermal Si02 dielectric as gate dielectrics exhibit excellent mobility and low interface trap density. However, the distribution of threshold voltages of $HfSiO_x/SiO_2$ stack devices were wider than those of $SiO_2$ and $HfSiO_x$ single layer devices due to the penetration of Hf and/or intermixing of $HfSiO_x$ with underlying $SiO_2$. The results of TZDB and SILC characteristics suggested that a certain portion of $HfSiO_x$ layer reacted with the underlying thick $SiO_2$ layer, which in turn affected the reliability characteristics.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.30A no.1
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• pp.23-30
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• 1993

Hydrogenation on the top gate and bottom gate Poly-Si TET's was performed by using Nh$_{3}$ plasma and annealing SiN film deposited by PECVD and then the electric characteristics on Poly-Si TET were investigated. As the time of NA$_{3}$ plasma treatment increaes, on/off current ratio gradually increases and the swing value decreases. The trap densities of graim boundaries in Poly-Si decrease very much during the inital 20min of hydrogenation time, and the decreasing scale becomes smaller after 20 min. The electric characteristics of the top gate TFT are better than those of the bottom gate TFT, it is considered due to the defects at the interface between the Poly-Si and the underlayer, SiO$_{2}$. After NH$_{3}$ plasma was treated for 2 hours for the top gate TFT, as the aging time atroon temperature increases on current was not scacely changed and off current decreases more than 1 order. Gate current density recovers to original value after the aging treatment for 8 days and then the electric characteristics are finally improved. It is suggested that the degraded characteristics of gate oxide are improved, from the variations of C-V characteristics with aging time. For the hydrogenation of isothermal and isochronal annealing SiN film deposited by PECVD, the characteristics of Poly-Si TFT are improved with increasing annealing temperature and are not largely changed with increasing annealing time. This results is good in agreement with the hydrogen reduction in Sin film as variations of annealing temperature and time.

• JSTS:Journal of Semiconductor Technology and Science
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• v.6 no.1
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• pp.10-15
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• 2006

Various sizes of erbium/platinum silicided n/p-type Schottky barrier metal-oxide-semiconductor field effect transistors (SB-MOSFETs) are manufactured from $20{\mu}m$ to 10nm. The manufactured SB-MOSFETs show excellent DIBL and subthreshold swing characteristics due to the existence of Schottky barrier between source and channel. It is found that the minimization of trap density between silicide and silicon interface and the reduction of the underlap resistance are the key factors for the improvement of short channel characteristics. The manufactured 10 nm n-type SBMOSFET showed $550{\mu}A/um$ saturation current at $V_{GS}-V_T$ = $V_{DS}$ = 2V condition ($T_{ox}$ = 5nm) with excellent short channel characteristics, which is the highest current level compared with reported data.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.25 no.1
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• pp.20-23
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• 2012

In this paper, we investigated the device performance on fluorine implantation, hot carrier reliability and RTS (random telegraph signal) noise characteristics of NMOSFETs. The capacitance of the fluorine implanted NMOSFET decreased due to the increase of the gate oxide thickness. RTS noise characteristics of the fluorine implated NMOSFET was improved approximately by 46% due to the decrease of trap density at Si/$SiO_2$ interface. The improved gate oxide quality also results in the longer hot carrier life time.

• 한국정보디스플레이학회:학술대회논문집
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• 2002.08a
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• pp.526-529
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• 2002

Various fluoride films on a glass substrate were prepared and characterized in order to determine the best seed layer for a microcrystalline silicon (${\mu}c$-Si) film growth. Among the various group-IIA-fluoride systems, the $CaF_2$films on glass substrates illustrated (220) preferential orientation and a lattice mismatch of less than 0.7% with Si. $CaF_2$ films exhibited a dielectric constant between $4.1{\sim}5.2$ and an interface trap density ($D_{it}$ as low as $1.8{\times}10^{11}\;cm^{-2}eV^1$. Using the $CaF_2$/glass structure, we were able to achieve an improved ${\mu}c$-Si film at a process temperature of 300 $^{\circ}C$. We have achieved the ${\mu}c$-Si films with a crystalline volume fraction of 65%, a grain size of 700 ${\AA}$, and an activation energy of 0.49 eV.

• Journal of the Korean Ceramic Society
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• v.32 no.11
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• pp.1262-1268
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• 1995

Photoelectrochemical properties of p-GaAs electrode have been investigated. I-V characteristic shows that the cathodic photocurrent is observed at -0.7 V vs. SCE. The photoresponse at near 870~880nm wavelength indicates that the photogenerated carriers contibuted to the observed current. The maximum converson efficiency of 35% is obtained for a Xe lamp light source at 400nm. In C-V relation, capacitance peaks appeared at the frequencies of 100Hz and 300Hz due to the activation of the interfacial states which exist at the energy level corresponding to the one-third of the GaAs band gap. The difference of about 1.1V between flatband potential (Vfb) from the Mott-Schottky method and onset voltage from I-V curve is observed due to the trap of carriers at the interfacial states in the boundary between GaAs and electrolyte. In case of WO3 deposited p-GaAs electrode, higher positive onset current and photocurent density are obtained. This can be explained by the fact that carriers are generated by light penetrated into the WO3 thin flm as well as p-GaAs substrate and then move into the electrolyte effectively.

• Proceedings of the Materials Research Society of Korea Conference
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• 2012.05a
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• pp.59.1-59.1
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• 2012

Organic thin-film transistors (OTFTs) with printable semiconductors are promising candidate devices for flexible active-matrix (AM) display applications. Yet, stable operation of actual display panels driven by OTFTs has seldom been reported up to date. Here, we demonstrate a flexible reflective type polymer dispersed liquid crystal (PDLC) display, in which inkjet-printed OTFT arrays are used as driving elements with excellent areal uniformity in terms of device performance. As the active semiconductor, a novel, ambient processable conjugated copolymer was synthesized. The stability of the devices with respect to electrical bias stress was improved by applying a channel-passivation layer, which suppresses the environmental effects and hence reduces the density of trap states at the channel/dielectric interface. The combination of high performance and high stability OTFT devices enabled the successful realization of stable operating flexible color-displays by inkjet-printing.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.44 no.4
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• pp.483-489
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• 1995

To investigate the mechanism generated by irradiation in the insulator layer irradiated MIS (Metal - Insulator - Semiconductor) device, the various types of MIS capacitors depending on insulator thickness, insulator types and implanted impurities are fabricated on the P-type wafer. MIS capacitors exposed by 1Mrad Co$^{60}$ .gamma.-ray are measured for flat band voltage and charge density shifts pre- and post-irradiation. The measuring results of post-irradiation show the flat band voltage shifting toward negative direction and charge density increasing regardless of parameters. This results have a good agreement with calculated data by computer simulation. Si$_{3}$N$_{4}$ layers have a good radiation-hardness than SiO$_{2}$ layers compared to the results of post-irradiation. Also, radiation-induced negative trap is discovered in the implanted insulator layer. Using numerical analysis, four continuty equations (conduction-band electrons continuity equation, valence-band holes continuity equation, trapped electrons continuity equation, trapped holes continuity equation) are solved and charge distributions according to the distance and Si-Insulator interface states are investigated.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.49 no.9
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• pp.502-509
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• 2000

In this paper in order to evaluat quantitavely the formation mechanism of space charge and its effects on the conduction characteristics in LDPE we have carried out the numerical analysis on the basis of experimental results of space charge distribution cathode field and current with time which had been simultaneously measured at applied field of 50kV/mm and room temperature. As the models for numerical analysis we employ the Richarson-Schottky theory for charge injection from electrode into LDPE and the band-tail conduction at crystalline regions and the hopping conduction by traps which mainly exist at the interface regions of crystalline-amorphous region for charge transport in LDPE. Futhermore in order to investigate the influence of physical parameters on the time characteristcs of space charge distribution and measured current we have changed the values of trap density activation energies for charge injection and transport and have analyzed their effects.