• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
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• pp.1193-1196
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• 2009

Low resistivity interconnection and high-mobility channel are required to realize ultrahigh-definition LCDs such as 4k ${\times}$ 2k TVs. We evaluated fully Cu-based gate and Source/Drain interconnections, consisting of stacked pure-Cu/Cu-Mn layers for TFT-LCDs, and found the underlying Cu-Mn alloy film has superior adhesion to glass substrates and CVD-SiOx films. It was also confirmed that wet etching of the Cu/Cu-Mn films without residues and low contact resistance with both channel IGZO and pixel ITO films can be obtained. It is thus considered that the stacked Cu/Cu-Mn structure is one of candidates to replacing conventionally pure-Cu/refractory metal.

• 전자통신동향분석
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• 제33권6호
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• pp.50-57
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• 2018

As devices have evolved, traditional flip chip bonding and recently commercialized thermocompression bonding techniques have been limited. Laser-assisted bonding is attracting attention as a technology that satisfies both the requirements of mass production and the yield enhancement of advanced packaging interconnections, which are weak points of these bonding technologies. The laser-assisted bonding technique can be applied not only to a two-dimensional bonding but also to a three-dimensional stacked structure, and can be applied to various types of device bonding such as electronic devices; display devices, e.g., LEDs; and sensors.

• 한국재료학회:학술대회논문집
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• 한국재료학회 1999년도 추계학술발표강연 및 논문개요집
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• pp.129-129
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• 1999

• 한국진공학회지
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• 제5권3호
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• pp.229-238
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• 1996

The electromigration phenomena and the characterizations of the conductor lifetime (Time-To-Failure, TTF) in Al-1%Si thin film interconnections under D.C. and Pulsed D.C. conditions were investigated . Meander type test patterns were fabricated with the dimensions of 21080$mu \textrm{m}$ length, 3$\mu\textrm{m}$ width, 0.7$\mu\textrm{m}$ thickness and the 0.1$\mu\textrm{m}$/0.8$\mu\textrm{m}$($SiO_2$/PSG)dielectric overlayer. The current densities of $2 \times10^6 A/\textrm{cm}^2$ and $1 \times10^7 A/\textrm{cm}^2$ were stressed in Al-1%Si thin film interconnection s under a D.C. condition. The peak current densities of $2 \times10^6 A/\textrm{cm}^2$ and $1 \times10^7 A/\textrm{cm}^2$ were also applied under a Pulsed D.C. condition at frequencies of 200KHz, 800KHz, 1MHz, and 4MHz with the duty factor of 0.5. THe time-to-failure under a Pulsed D.C.($TTF_{pulsed D.C}$) was appeared to be larger than that under a D.C. condition. It was found that the TTF under both a D.C. and a Pulsed D.C. condition. It was found that the TTF under both a D.C. and a Pulsed D.C. condition largely depends upon the appiled current densities respectively . This can be explained by a relaxation mechanism view due to a duty cycle under a Pulsed D.C. related to the wave on off. The relaxation phenomena during the pulsed off period result in the decayof excess vacancies generated in the Al-1%Si thin film interconnections because of the electrical and mechanical stress gradient . Hillocks and voids formed by an electromigration were observed by using a SEM (Scanning Electron Microscopy).

• Korean Chemical Engineering Research
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• 제46권2호
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• pp.389-396
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• 2008

벤조시클로부텐(benzocyclobutene; BCB)과 플라즈마 화학기상증착(PECVD)된 산화규소막이 코팅된 웨이퍼들 사이의 계면에서, 고온 열순환 공정에 의한 잔류응력 및 본딩 결합력의 효과를 4점 굽힙시험법과 웨이퍼 곡률 측정법에 의해 평가하였다. 이를 위해 웨이퍼들은 사전에 확립된 표준 본딩공정에 의거하여 본딩하였으며 이들 웨이퍼에 대한 열순환 공정은 상온으로부터 최대 순환온도 사이에서 수행하였다. 최대 온도 350 및 $400^{\circ}C$에서 수행한 열순환 공정에서, 본딩 결합력은 첫번째 순환공정 동안 크게 증가하는 데, 이는 순환공정 시 발생하는 산화규소막의 축합 반응에 의한 잔류응력 감소 때문인 것으로 분석되었다. 이러한 산화규소막의 잔류응력이 감소함에 따라 BCB와 산화규소막으로 구성된 다층막의 잔류응력에 의해 변형되는 에너지는 상승하였고 따라서 BCB와 산화규소막 사이 다층막의 의 본딩 결합력은 증가하였다.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1998년도 추계종합학술대회 논문집
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• pp.1297-1300
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• 1998

In this paper, we discuss the identification of a chaotic system using chaotic neural networks. Because of selfconnections in neuron itself and interconnections between neurons, chaotic neural networks identifiers show good performance in highly nonlinear dynamics such as chaotic system. Simulation results are presented to demonstrate robustness of chaotic neural networks identifier.

• JSTS:Journal of Semiconductor Technology and Science
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• 제14권5호
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• pp.649-657
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• 2014

In this study, the effects of the frequency-dependent characteristics of through-silicon vias (TSVs) on the performance of 3D ICs are examined by evaluating a typical interconnection structure, which is composed of 32-nm CMOS inverter drivers and receivers connected through TSVs. The frequency-domain model of TSVs is extracted in S-parameter from a 3D electromagnetic (EM) method, where the dimensional variation effect of TSVs can be accurately considered for a comprehensive parameter sweep simulation. A parametric analysis shows that the propagation delay increases with the diameter and height of the TSVs but decreases with the pitch and liner thickness. We also investigate the crosstalk effect between TSVs by testing different signaling conditions. From the simulations, the worst signal integrity is observed when the signal experiences a simultaneously coupled transition in the opposite direction from the aggressor lines. Simulation results for nine-TSV bundles having regular and staggered patterns reveal that the proposed method can characterize TSV-based 3D interconnections of any dimensions and patterns.

• Journal of Power Electronics
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• 제18권5호
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• pp.1357-1368
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• 2018

In this paper, a novel high gain bidirectional modular dc-dc converter (BMC) with unipolar and bipolar structures for dc network interconnections is proposed. When compared with traditional dc grid-connecting converters, the proposed converter can achieve a high voltage gain with a simple modular transformerless structure. A sub-modular structure for the BMC is proposed to eliminate the unbalanced current stress between the different power units (levels) in the BMC. This can realize current sharing and standardized production and assembling. In addition, phase-interval operation is introduced to the sub-modules to realize low voltage and current ripple in both sides of the converter. Furthermore, two types of bipolar topologies of the sub-modular BMC were proposed to extend its application in bipolar dc network connections. In addition, the control system was optimized for grid-connection applications by providing various control strategies. Finally, simulations of a 3-level unipolar sub-modular BMC and a 4-level bipolar sub-modular BMC were conducted, and a 1-kW experimental 3-level unipolar prototype was developed to verify the effectiveness of the proposed converter.

• 전자공학회논문지
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• 제52권1호
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• pp.3-6
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• 2015

최근 들어 다양한 센서를 장착한 스마트 건물의 등장이 가시화 됨에 따라 센서로부터 데이터의 수집과 분석이 중요하게 되었다. 센서로부터 데이터를 획득하기 위해서는 일정구간의 유선화는 불가피하나 유선화 구간을 최소화하고 건물에 따라서는 센서간의 통신을 무선으로 함을 목표로 하고 있다. 이러한 케이블링에 따른 비용부담과 건물의 손상 등을 방지하기 위해서는 무선화가 가능한 구역의 선정 및 건물 구조에 따른 신호전달 특성을 객관적으로 파악하는 것이 매우 중요하다. 본 논문에서는 건물 내 신호전달 특성을 측정하기 위한 시스템의 설계를 다루고 시뮬레이션을 통해 시스템의 동작을 확인한다.

• 한국ITS학회 논문지
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• 제9권3호
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• pp.85-93
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• 2010

본 논문에서는 SOC 설계 자동화를 위한 할당 및 바인딩을 동시에 수행하는 새로운 동적인 하드웨어 할당 및 바인딩 알고리즘을 제안한다. 제안된 알고리즘은 스케줄링의 결과를 입력으로 받아들이고, 각 기능 연산자에 연결된 레지스터 및 연결 구조가 최대한 공유하도록 제어스텝마다 연산과 기억 소자의 상호 연결 관계를 고려하여 기능 연산자, 연결 구조 및 레지스터를 동시에 할당 및 바인딩을 한다. 제안된 알고리즘은 각 시스템마다 비교 실험을 통하여 기존의 기능 연산자와 레지스터의 수를 미리 정했거나, 분리하여 수행한 방식들과 비교함으로서 제안된 알고리즘의 효용성을 보인다.