• Proceedings of the Korean Information Science Society Conference
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• 1999.10c
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• pp.60-62
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• 1999

미세 회로 기술의 발전은 단일 칩에 집적될 수 있는 트랜지스터의 수를 지속적으로 증가시키고 있으며 이에 따라 설계의 복잡도 역시 크게 증가하고 있다. 이러한 설계 복잡도의 증가는 여러 기능 블록이 IP(Intellectual Property) 형태로 독립적으로 설계되어서 이들의 조합으로 새로운 시스템을 구성하는 시스템 온 칩(System On a Chi)과 같은 새로운 시스템 설계 방법에 대한 요구를 증가시키고 있다.[1]. 이런 시스템 온 칩에 사용될 메모리 시스템 역시 기존의 표준화된 메인 메모리 이 외에 각각의 다양한 응용에 적합한 맞춤형(Application Specific Standard Products) 내장 메모리 시스템 구조에 대한 필요성이 대두되고 있다. 이와 같이 특정 응용에 적합한 메모리 시스템을 설계할 수 있는 기본 정보를 제공해 주는 것이 필수적이다. 또한 이러한 정보에 따라 설계된 메모리 시스템에 대한 성능 평가할 환경도 함께 요구된다. 본 연구에서는 다양한 응용의 메모리 참조 특성을 분석하고 특성화하기 위하여 캐쉬 파라메터의 변화에 따른 캐쉬 접근 실패의 분포, 메모리 접근 영역의 분포, 참조 사이에 있는 유일한 참조의 수의 분포 등 다양한 정보를 제공해 주는 환경을 구축하였다.

• Agribusiness and Information Management
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• v.4 no.2
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• pp.32-41
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• 2012

Studies have shown that the future of the wine market rests on the effective and efficient changes in technology to the supply chain used by most of the major global players. In today's wine industry, companies are faced with the ever-shifting demand for their products, strict regulation and increasing price competition. Even at that, mature companies in the wine industry are succeeding by scaling up production, streamlining their supply chains, expanding into new geographic areas, implementing more efficient processes, cleverly marketing products, and focusing on ever closer relationships with suppliers, partners and customers. However, this paper looks at supply chain challenges in the wine industry from a global perspective presented in the inbound, manufacturing and outbound processes as well as offer effective solutions in order for companies to gain a competitive advantage and succeed on a global level.

• Proceedings of the IEEK Conference
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• 2000.07a
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• pp.379-382
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• 2000

We designed a self-timed interface circuit for efficient communication in IP (Intellectual Property)-based system with high-speed self-timed FIFO and a set of self-timed event logic library with 0.25um CMOS technology. Optimized self-timed standard cell layouts and Verilog models are generated for top-down design methodology. A method for mitigating a design bottleneck when it comes to tolerate clock skew is described. With clock control method and FIFO, we implemented high-speed 32bit-interface chip for self-timed system, which generated maximum system clock is 2.2GHz. The size of the core is about 1.1mm x 1.1mm.

• Journal of the Korea Society of Computer and Information
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• v.16 no.11
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• pp.1-8
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• 2011

The requirement of a system-on-a-chip (SoC) design is increasing, which combines various and complex functional units on a single device. However, short time to market prohibits to release the device. To satisfy this shorter time-to-market, verification of both hardware and software at the same time is important. A virtual platform-based design method supports faster verification of these combined software and hardware by reusing pre-defined intellectual properties (IP). In this paper, we introduce the virtual platform-based design and redesign the existing ARM processor based S3C2440A system using the virtual platform-based method. In addtion, we implement and evaluate the performance of a JPEG decoder on the S3C2440A virtual platform. Furthermore, we introduce an optimized technique of the JPEG decoder using the ARM based inline assembly language, and then verify the performance improvement on the virtual platform. Such virtual platform-based design allows to verify both software and hardware at the same time and can meet the requirement of the shorter time-to-market.

• Journal of Digital Convergence
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• v.16 no.6
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• pp.163-173
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• 2018

The purpose of this study is to find the role of intellectual property belief between brand concepts (Symbolic vs. Functional) and brand extension. For this purpose, three parent brands (Rolex vs. Casio, Prada vs. Coach, Benz vs. Toyota) and three extension products (bracelets, shoes, vehicles) were selected as stimulants through focus group interviews and pre-tests. 296 sample data across the country were collected and the final analysis was conducted with 290 respondents except for the inappropriate respondents by SPSS 21.0. The results of this study confirm that the trademark meditates the relationship between belief brand concepts and brand extension and thinking style of consumers meditated-moderates between belief brand concepts and brand extension. The results of this study are based on implication that intellectual property belief induce consumers positive reactions on brand extension and that the acquisition and utilization of IPRs bring corporate's continuous growth and enhance the corporate brand value.

• Journal of Advanced Navigation Technology
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• v.25 no.5
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• pp.363-369
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• 2021

In this paper, We propose variable cut-off frequency and variable sample rate small-area multi-channel digital filter for telemetry system. Proposed digital filter reduced hardware area by implementing filter banks that can variably use cut-off frequency and sample rate without additional filter banks for an arbitrary cut ratio. In addition, We propose the architecture in which sample rate can variably be selected according to the number of filters that pass through the multiplexer control. By using time division multiplexing (TDM) supported by the finite impulse response (FIR) intellectual property (IP) of Quartus, the proposed digital filter can greatly reduce digital signal processing (DSP) blocks from 80 to 1 compared without TDM. Proposed digital filter calculated order and coefficients using Kaiser window function in Matlab, and implemented using very high speed integrated circuits hardware descryption language (VHDL). After applying to the telemetry system, we confirmed that the proposed digital filter was operating through the experimental results in the test environment.

• Journal of Convergence for Information Technology
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• v.9 no.2
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• pp.115-120
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• 2019

Chinese xian-xia films is a new genre that occurred through the fusion of the genre of martial arts and fantasy. This study analyzed the development of xian-xia films and the space aesthetics of xian-xia films through the miseenscene of the journey to the west films. In particular, the space for xian-xia in the films is divided into the human, urinary, heaven world and the space of conflict. It looks like the fantastic Middle Earth that Tolkien presented, however it is discriminatory in that it shows a highly Chinese appearance and overlapping world centered on the natural environment (the world of Mountains and Livers), such as mountains, deserts, caves, and grasslands, which usually appears in traditional martial arts history. Resently, the boom of journey to the west films is regarded as the change of the Chinese film industry under the influence of the development of IP (Intellectual Property) industry and the western fantasy genre in the 21st century China. This change marks the birth of the new Chinese fantasy "xian-xia" genre with the spirit of the present era that transcends the original world of journey to the west through the hybridization of the genre.

• Journal of IKEEE
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• v.25 no.4
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• pp.625-633
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• 2021

This paper describes a scalable architecture for flexible hardware implementation of Montgomery modular multiplication. Our scalable modular multiplier architecture, which is based on a one-dimensional array of processing elements (PEs), performs word parallel operation and allows us to adjust computational performance and hardware complexity depending on the number of PEs used, N_PE. Based on the proposed architecture, we designed a scalable Montgomery modular multiplier (sMM) core supporting eight field sizes defined in SEC2. Synthesized with 180-nm CMOS cell library, our sMM core was implemented with 38,317 gate equivalents (GEs) and 139,390 GEs for N_PE=1 and N_PE=8, respectively. When operating with a 100 MHz clock, it was evaluated that 256-bit modular multiplications of 0.57 million times/sec for N_PE=1 and 3.5 million times/sec for N_PE=8 can be computed. Our sMM core has the advantage of enabling an optimized implementation by determining the number of PEs to be used in consideration of computational performance and hardware resources required in application fields, and it can be used as an IP (intellectual property) in scalable hardware design of elliptic curve cryptography (ECC).

• Journal of Korea Entertainment Industry Association
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• v.14 no.4
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• pp.31-45
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• 2020

The objective of this study was to understand the characteristics of Chinese cultural industry shown in the analysis of a successful IP martial arts stage play 'Seongeomg ihyeopjeon' that applied martial arts as Chinese traditional culture. The cultural industry of Chin a has modified the relevant legislation since China's reform and opening up in 1979, and the term 'intellectual property rights(IP)' was used in the Chinese laws for the first time in 2008. Thus, transcending the instrumental scope for maintaining the regime in the past, the culture was regarded as an economic profit industry and a representative industry for strengthening the soft power of traditional culture. The results of analysis on the stage play are as follows. First, the Chinese cultural industry has been developed by support policies for strengthening the soft power of Chinese-characteristic traditional culture and overseas expansion through the state-led modification of relevant legislation. Second, the Chinese cultural industry is including its unique traditional cultural factors, and the succe ssful marke ting results could be obtained only when the high awareness and many fans are secured. Third, for the inflow of audiences through the work advertising, it would be preferentially needed to analyze various opinions of fans through active SNS communications with them instead of the existing advertising such as TV, radio, and newspaper, and also to reflect the national cultural industry policies and producers' opinions.

• Journal of Korea Multimedia Society
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• v.12 no.2
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• pp.200-208
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• 2009

JBIG2, as the next generation standard for binary image compression, must be designed in hardware modules for the JBIG2 FAX to be implemented in an embedded equipment. This paper proposes a hardware module of the high-speed Huffman coder for JBIG2. The Huffman coder of JBIG2 uses selectively 15 Huffman tables. As the Huffman coder is designed to use minimal data and have an efficient memory usage, high speed processing is possible. The designed Huffman coder is ported to Virtex-4 FPGA and co-operating with a software modules on the embedded development board using Microblaze core. The designed IP was successfully verified using the simulation function test and hardware-software co-operating test. Experimental results shows the processing time is 10 times faster than that of software only on embedded system, because of hardware design using an efficient memory usage.