• The Transactions of the Korean Institute of Electrical Engineers P
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• v.57 no.3
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• pp.255-259
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• 2008

In this paper, a current-mode integrator for low-voltage, low-power analog integrated circuits is presented. Using the proposed current-mode integrator, the baseband analog filter is designed for WCDMA wireless communication. To verify the proposed current-mode integrator circuit, Hspice simulation using 1.8V TSMC $0.18{\mu}m$ CMOS parameter is performed and achieved 44.9dB gain, 15.7MHz unity gain frequency. The described 3rd-order current-mode baseband analog filter is composed of the proposed current-mode integrator, and SFG(Signal Flow Graph) method is used to realize the baseband filter. The simulated results show 2.12MHz cutoff frequency which is suitable for WCDMA baseband block.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.57 no.3
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• pp.260-264
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• 2008

In this paper, a dual mode baseband analog channel selection filter is described which is designed for the Bluetooth and WCDMA wireless communications. Using the presented current-mode integrator, a dual mode channel selection filter is designed. To verify the current-mode integrator circuit, Hspice simulation using 1.8V Hynix $0.18{\mu}m$ standard CMOS technology was performed and achieved $50.0{\sim}4.3dB$ gain, $2.29{\sim}10.3MHz$ unity gain frequency. The described third-order dual mode analog channel selection filter is composed of the current-mode integrator, and used SFG(Signal Flow Graph) method. The simulated results show 0.51, 2.40MHz cutoff frequency which is suitable for the Bluetooth and WCDMA baseband block each.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.6
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• pp.30-38
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• 1998

In this paper, a new CMOS current-mode integrator is proposed that can apply the basic building block of the low-voltage high frequency current-mode active filter. And tuning circuits that control the gain and unity gain frequency of them is designed. The proposed integrator is composed of the CMOS complementary circuit which can extend transconductance of an integrator. Therefore, the unity gain frequency which is determined transconductance and MOSFET gate capacitance can be expanded by the proposed integrator. The unity gain frequency of the proposed integrator is increased about two times larger than that of the conventional continuous-time integrator with NMOS-gm. And also, cut-off frequency and gain of the active filter can be controlled with the designed tuning circuit. From the result, we can reduce errors on fabrication. And then, 3rd-order low-pass active filter is designed as an application circuits. These results are verified by the small signal analysis and the 0.8$\mu\textrm{m}$ parameter HSPICE simulation.

• The Journal of the Korea institute of electronic communication sciences
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• v.8 no.10
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• pp.1477-1483
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• 2013

This paper proposes a low-voltage current-mode integrator for a continuous-time current-mode baseband channel selection filter. The low-voltage current-mode linear cascode integrator is introduced to offer advantages of high current gain and improved unity-gain frequency. The proposed current-mode integrator has fully differential input and output structure consisting of CMOS complementary circuit. Additional cascode transistors which are operated in linear region are inserted for bias to achieve the low-voltage feature. Frequency range is also controllable by selecting proper bias voltage. From simulation results, it can be noticed that the implemented integrator achieves design specification such as low-voltage operation, current gain, and unity gain frequency.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.1
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• pp.50-55
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• 2011

In this paper, Intermediate frequency tunable 4th order Switched Capacitor(SC) bandpass Sigma-Delta(${\Sigma}-{\Delta}$) modulator using feedback integrator using feedback integrator coefficients is proposed. The center frequency of the modulator can be easily changed than conventional structure because of a number of integrator coefficients which is decided rate of capacitors in circuit is reduced. In addition additive clocks and additive clock generating circuit are not necessary. The purposed modulator was implemented in $0.18{\mu}m$ CMOS technology. The resolution of the modulator within 200 kHz bandwidth and 80 MHz sampling frequency under fin = 15 MHz, 20 MHz, 25 MHz are over 12 bit.

• Journal of the Korean Institute of Telematics and Electronics
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• v.25 no.11
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• pp.1274-1281
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• 1988

A new voltage-controlled oscillator based on a voltage-controlled integrator has been developed. It consists of a Schmitt-trigger and a voltage-controlled integrator, which is realized by an operational transconductance amplifier (OTA) and a grounded capacitor. The input control voltage changes the time constant of the integrator, and hence the oscillation frequency. The SPICE simulation shows that a prototype circuit, which oscillates at 12.21 KHz at 0 V, has the conversion sencitivity 2,437 Hz/V and the residual nonlinearity less than 0.68% in a control voltage range from -2 V to 2 V. It also shows that the circuit provides a temperature drift less than + 250 ppm/$^{\circ}$C for frequencies up to 100 KHz.

• Proceedings of the KIEE Conference
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• 1988.11a
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• pp.465-468
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• 1988

A n-well CMOS Operational Transconductance Amplifier -C(OTA-C) integrator with a wide linear input range is designed. The circuit designed has superior linearity of input voltage range compared with the conventional source-coupled pair OTA. The OTA developed in this paper is versatile in application: diverse applications are in the fields of linear amplifiers, continuous-time filters, gain control circuits, and analog multipliers, etc..

• The Transactions of The Korean Institute of Electrical Engineers
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• v.60 no.4
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• pp.871-876
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• 2011

In this paper, a voltage-controlled frequency tunable current-mode integrator and a 3rd-order current-mode Chebyshev filter in 1.8V-$0.18{\mu}m$ CMOS is realized for software radio applications in system-on-chips. This filter is used for reconstruction purposes between a current-steering DAC and a current-mode mixer. Power consumption of the designed filter can be reduced by using a current-mode small size integrator. And also, cutoff frequency of this filter is variable between 1.2MHz and 10.1MHz, the power consumption is 2.85mW. And the voltage bias compensated circuit is used to control the voltage variation.in the designed filter.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.11 no.10
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• pp.3905-3910
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• 2010

In this paper, a 3rd-order Chebyshev current-mode filter in 1.8V-$0.18{\mu}m$ CMOS parameter is designed. The core circuit of the current-mode filter is composed with the proposed voltage-controlled frequency tunable current-mode integrator. Using the proposed current-mode integrator, the cutoff frequency of the filter can be controlled and also total power consumption can be reduced. HSPICE simulation results show the cutoff frequency of the filter is controlled between 1.2MHz and 10.1MHz, and the power consumption is 2.85mW at Vdd=1.8V.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.10 no.12
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• pp.3614-3621
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• 2009

In this paper, A CMOS low-voltage current mode integrator is designed. The designed current-mode integrator is based on linear cascode circuit that is newly proposed in this paper. When it is compared with gain(43.7dB) and unity gain frequency(15.2MHz) of the typical current-mirror type current-mode integrator, the proposed linear cascode current-mode integrator achieves high current gain(47.8dB) and unity gain frequency(27.8MHz). And a 5th Chebyshev current-mode filter with 7.03MHz cutoff frequency is designed. The designed all circuits are simulated by HSPICE using 1.8V-$0.18{\mu}m$ CMOS technology.