Journal of the Korea Academia-Industrial cooperation Society (한국산학기술학회논문지)

The Korea Academia-Industrial cooperation Society (한국산학기술학회)
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Improvement of Gain and Frequency Characteristics of the CMOS Low-voltage Current-mode Integrator

CMOS 저전압 전류모드 적분기의 이득 및 주파수 특성 개선

  • Ryu, In-Ho (Dept. of IT Applied System Engineering. Chonbuk National University) ;
  • Song, Je-Ho (Dept. of IT Applied System Engineering. Chonbuk National University) ;
  • Bang, Jun-Ho (Dept. of IT Applied System Engineering. Chonbuk National University)
  • 유인호 (전북대학교 IT응용시스템공학과) ;
  • 송제호 (전북대학교 IT응용시스템공학과) ;
  • 방준호 (전북대학교 IT응용시스템공학과)
  • Published : 2009.12.31
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Abstract

In this paper, A CMOS low-voltage current mode integrator is designed. The designed current-mode integrator is based on linear cascode circuit that is newly proposed in this paper. When it is compared with gain(43.7dB) and unity gain frequency(15.2MHz) of the typical current-mirror type current-mode integrator, the proposed linear cascode current-mode integrator achieves high current gain(47.8dB) and unity gain frequency(27.8MHz). And a 5th Chebyshev current-mode filter with 7.03MHz cutoff frequency is designed. The designed all circuits are simulated by HSPICE using 1.8V-$0.18{\mu}m$ CMOS technology.

본 논문에서는 이득 및 주파수 특성이 개선된 CMOS 저전압 전류모드 적분기가 설계되었다. 설계된 전류모드 적분기는 본 논문에서 새롭게 제안한 선형 캐스코드 회로를 기본으로 구성되었다. 제안된 전류모드 적분기는 기존의 전류미러형 전류모드 적분기의 이득(43.7dB) 및 단위이득주파수(15.2MHz) 비해서 높은 전류이득(47.8dB) 및 단위 이득 주파수(27.8MHz)의 특성을 얻을 수 있었다. 제안된 전류모드 적분기의 응용회로로써 차단주파수 7.03MHz를 갖는 5차 체비세프 저역통과 필터를 설계하였다. 설계된 모든 회로들은 1.8V-$0.18{\mu}m$ CMOS 공정파라메터로써 HSPICE를 이용하여 시뮬레이션되었다.

Keywords

References

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