• 전기학회논문지
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• 제57권7호
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• pp.1254-1259
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• 2008

A new CMOS current-mode integrator for low-voltage analog integrated circuit design is presented. The proposed current-mode integrator is based on cross-coupled gain-boosting topology. When it is compared with that of the typical current-mirror type current-mode integrator, the proposed current-mode integrator achieves high current gain and unity gain frequency with the same transistor size. As a application circuit of the proposed integrator, we designed the 1.8V 200MHz band current-mode lowpass filter. These are verified by Hspice simulation using $0.18{\mu}m$ CMOS technology.

• 전자공학회논문지B
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• 제33B권4호
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• pp.52-62
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• 1996

In this paper, a new continuous-time current-mode integrator as basic building block of the low-voltage analog current-mode active filters was proposed. Compared to the current-mode integrator which was proposed by Zele, the proposed current-mode integrator had higher unity gain frequency and output impedance in addition to lower power dissipation. And also, a current-mode third-order lowpass active filter was designed with the proposed current-mode integrator. The designed circuits were fabricated using the ORBIT's 1.2.mu.m double-poly double-metal CMOS n-well process. The experimental resutls of the active filter designed and fabricated for this research have shown that it has the performance of 44.5MHz cutoff frequency, 3.3mW power dissipation and the third-order active filter area was 0.12mm$^{2}$.

• 전기학회논문지P
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• 제57권3호
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• pp.255-259
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• 2008

In this paper, a current-mode integrator for low-voltage, low-power analog integrated circuits is presented. Using the proposed current-mode integrator, the baseband analog filter is designed for WCDMA wireless communication. To verify the proposed current-mode integrator circuit, Hspice simulation using 1.8V TSMC $0.18{\mu}m$ CMOS parameter is performed and achieved 44.9dB gain, 15.7MHz unity gain frequency. The described 3rd-order current-mode baseband analog filter is composed of the proposed current-mode integrator, and SFG(Signal Flow Graph) method is used to realize the baseband filter. The simulated results show 2.12MHz cutoff frequency which is suitable for WCDMA baseband block.

• 전기학회논문지P
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• 제57권3호
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• pp.260-264
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• 2008

In this paper, a dual mode baseband analog channel selection filter is described which is designed for the Bluetooth and WCDMA wireless communications. Using the presented current-mode integrator, a dual mode channel selection filter is designed. To verify the current-mode integrator circuit, Hspice simulation using 1.8V Hynix $0.18{\mu}m$ standard CMOS technology was performed and achieved $50.0{\sim}4.3dB$ gain, $2.29{\sim}10.3MHz$ unity gain frequency. The described third-order dual mode analog channel selection filter is composed of the current-mode integrator, and used SFG(Signal Flow Graph) method. The simulated results show 0.51, 2.40MHz cutoff frequency which is suitable for the Bluetooth and WCDMA baseband block each.

• 한국전자통신학회논문지
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• 제8권10호
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• pp.1477-1483
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• 2013

연속시간 전류모드 기저대역 채널선택 필터 설계를 위하여 전류이득과 단위이득 주파수를 개선시킨 저전압 선형 캐스코드 전류모드 적분기를 제안하였다. 제안된 전류모드 적분기는 CMOS 상보형 회로로 구성된 완전 차동 형태의 입 출력단으로 구성하였으며, 여기에 캐스코드 트랜지스터를 추가시킴으로써 바이어스 단을 구성하여 선형영역에서 동작시켜 저전압 구조에 적합하도록 설계하였다. 이 때 바이어스 전압을 선택적으로 제어하여 주파수 대역이 가변될 수 있도록 설계하였다. 시뮬레이션 결과를 통해 설계한 선형 캐스코드 전류모드 적분기가 저전압 동작, 전류 이득 및 단위이득 주파수 등 모두 만족할 만한 특성을 가지고 있음을 확인하였다.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2002년도 ITC-CSCC -2
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• pp.747-750
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• 2002

A circuit building block for realizing a continuous-time active-only current-mode integrator is presented. The proposed integrator is composed only of internally compensated type operational amplifier (OA) and operational transconductance amplifiers (OTAs). The integrator is suitable for integrated circuit implementation in either bipolar or CMOS technologies, since it does not require any external passive elements. Moreover, the integrator gain can be tuned through the transconductance gains of the OTAs. Some application examples in the realization of current-mode network functions using the proposed current-mode integrator as an active element are also given.

• 한국통신학회논문지
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• 제22권4호
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• pp.685-695
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• 1997

In this paper, a new CMOS continuous-time fully-differential current-mode integrator is proposed as a basic building block of the low-voltage high frequency current-mode active filter. The proposed integrator is composed of the CMOS complementary circuit which can extend transconductance of an integrator. Therefore, the unity gain frequency which is determined by a small-signal transconductance and a MOSFET gate capacitance can be expanded by the complementary transconductance of the proposed integrator. And also the magnitude of pole and zero are increased. The unity gain frequency of the proposed integrator is increased about two times larger than that of the conventional continuous-time fully-differential integrator with NMOS-gm. These results are verified by the small signal analysis and the SPICE simulation. As an application circuit of the proposed fully-differential current-mode integrator, the three-pole Chebyshev lowpass filter is designed using 0.8.$\mu$m CMOS processing parameters. SPICE simulation predicts a 3-dB bandwidth of 148MHz and power dissipation of 4.3mW/pole for the three-pole filter with 3-V power supply.

• 한국산학기술학회논문지
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• 제10권12호
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• pp.3614-3621
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• 2009

본 논문에서는 이득 및 주파수 특성이 개선된 CMOS 저전압 전류모드 적분기가 설계되었다. 설계된 전류모드 적분기는 본 논문에서 새롭게 제안한 선형 캐스코드 회로를 기본으로 구성되었다. 제안된 전류모드 적분기는 기존의 전류미러형 전류모드 적분기의 이득(43.7dB) 및 단위이득주파수(15.2MHz) 비해서 높은 전류이득(47.8dB) 및 단위 이득 주파수(27.8MHz)의 특성을 얻을 수 있었다. 제안된 전류모드 적분기의 응용회로로써 차단주파수 7.03MHz를 갖는 5차 체비세프 저역통과 필터를 설계하였다. 설계된 모든 회로들은 1.8V-$0.18{\mu}m$ CMOS 공정파라메터로써 HSPICE를 이용하여 시뮬레이션되었다.

• 전기학회논문지
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• 제60권4호
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• pp.871-876
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• 2011

In this paper, a voltage-controlled frequency tunable current-mode integrator and a 3rd-order current-mode Chebyshev filter in 1.8V-$0.18{\mu}m$ CMOS is realized for software radio applications in system-on-chips. This filter is used for reconstruction purposes between a current-steering DAC and a current-mode mixer. Power consumption of the designed filter can be reduced by using a current-mode small size integrator. And also, cutoff frequency of this filter is variable between 1.2MHz and 10.1MHz, the power consumption is 2.85mW. And the voltage bias compensated circuit is used to control the voltage variation.in the designed filter.

• 한국산학기술학회논문지
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• 제10권12호
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• pp.3638-3644
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• 2009

본 논문에서는 새롭게 제안한 선형 캐스코드 전류모드 적분기를 기본으로 구성된 다중채널 CMOS 저전압 전류모드 필터를 설계하였다. 제안된 전류모드 적분기는 기존의 전류미러형 전류모드 적분기 비해서 높은 전류이득 및 단위이득 주파수 특성을 얻을 수 있다. 5차 체비셰프 함수로써 구성한 필터는 신호흐름선도(SFG)기법에 의하여 능동필터로 변환되었다. 1.8V-$0.18{\mu}m$ CMOS 공정파라미터를 사용한 HSPICE 시뮬레이션 결과, 설계된 필터는 0.51MHz에서 7.03MHz대역까지의 주파수 조정범위를 가지며 Bluetooth, DECT, WCDMA의 3채널의 기저대역에서 사용할 수 있음을 확인하였다.