• Title/Summary/Keyword: Insulating Gate

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Thin Film Transistor with Transparent ZnO as active channel layer (투명 ZnO를 활성 채널층으로 하는 박막 트랜지스터)

  • Shin Paik-Kyun
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.55 no.1
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    • pp.26-29
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    • 2006
  • Transparent ZnO thin films were prepared by KrF pulsed laser deposition (PLD) technique and applied to a bottom-gate type thin film transistor device as an active channel layer. A high conductive crystalline Si substrate was used as an metal-like bottom gate and SiN insulating layer was then deposited by LPCVD(low pressure chemical vapour deposition). An aluminum layer was then vacuum evaporated and patterned to form a source/drain metal contact. Oxygen partial pressure and substrate temperature were varied during the ZnO PLD deposition process and their influence on the thin film properties were investigated by X-ray diffraction(XRD) and Hall-van der Pauw method. Optical transparency of the ZnO thin film was analyzed by UV-visible phometer. The resulting ZnO-TFT devices showed an on-off ration of $10^6$ and field effect mobility of 2.4-6.1 $cm^2/V{\cdot}s$.

Formation of PVP- Based Organic Insulating Layers and Fabrication of OTFTs (PVP-기반 유기 절연막 형성과 OTFT 제작)

  • Jang, Ji-Geun;Seo, Dong-Gyoon;Lim, Yong-Gyu
    • Korean Journal of Materials Research
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    • v.16 no.5
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    • pp.302-307
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    • 2006
  • The formation and processing of organic insulators on the device performance have been studied in the fabrication of organic thin film transistors (OTFTs). The series of polyvinyls, poly-4-vinyl phenol(PVP) and polyvinyltoluene (PVT), were used as solutes and propylene glycol monomethyl ether acetate(PGMEA) as a solvent in the formation of organic insulators. The cross-linking of organic insulators was also attempted by adding the thermosetting material, poly (melamine-co-formaldehyde) as a hardener in the compound. The electrical characteristics measured in the metal-insulator-metal (MIM) structures showed that insulating properties of PVP layers were generally superior to those of PVT layers. Among the layers of PVP series: PVP(10 wt%) copolymer, 5 wt% cross-linked PVP(10 wt%), PVP(20 wt%) copolymer, 5 wt% cross-linked PVP(20 wt%) and 10 wt% cross-linked PVP(20 wt%), the 10 wt% cross-linked PVP(20 wt%) layer showed the lowest leakage current characteristics. Finally, inverted staggered OTFTs using the PVP(20 wt%) copolymer, 5 wt% cross-linked PVP(20 wt%) and 10 wt% cross-linked PVP(20 wt%) as gate insulators were fabricated on the polyether sulphone (PES) substrates. In our experiments, we could obtain the maximum field effect mobility of 0.31 $cm^2/Vs$ in the device from 5 wt% cross-linked PVP(20 wt%) and the highest on/off current ratio of $1.92{\times}10^5$ in the device from 10 wt% cross-linked PVP(20 wt%).

Formation and Characterization of Polyvinyl Series Organic Insulating Layers (폴리비닐 계열 유기절연막 형성과 특성평가)

  • Jang Ji-Geun;Jeong Jin-Cheol;Shin Se-Jin;Kim Hee-Won;Kang Eui-Jung;Ahn Jong-Myong;Seo Dong-Gyun;Lim Yong-Gyu;Kim Min-Young
    • Journal of the Semiconductor & Display Technology
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    • v.5 no.1 s.14
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    • pp.39-43
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    • 2006
  • The polyvinyl series organic films as gate insulators of thin film transistor(TFT) have been processed and characterized on the polyether sulphone (PES) substrates . The poly-4-vinyl phenol(PVP) and polyvinyl toluene (PVT) were used as solutes and propylene glycol monomethyl ether acetate(PGMEA) as a solvent in the formation of organic insulators. The cross-linking of organic insulators was also attempted by adding the thermosetting material, poly (melamine-co-formaldehyde) as a hardener in the compound. The electrical characteristics measured in the metal-insulator-metal (MIM) structures showed that insulating properties of PVP layers were generally superior to those of PVT layers. Among the layers of PVP series; copolymer PVP(10 wt%), 5wt% cross-linked PVP(10 wt%), copolymer PVP(20 wt%), 5 wt% cross-linked PVP(20 wt%) and 10 wt% cross-linked PVP(20 wt%), the 10 wt% cross-linked PVP(20 wt%) layer showed the lowest leakage current of 1.2 pA at ${\pm}10V$. The ms value of surface roughness and the capcitance per unit area are 2.41 and $1.76nF/cm^2$ in the case of 10 wt% cross-linked PVP(20 wt%) layer, respectively.

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Fabrication of a Depletion mode n-channel GaAs MOSFET using $Al_2O_3$ as a gate insulator ($Al_2O_3$ 절연막을 게이트 절연막으로 이용한 공핍형 n-채널 GaAs MOSFET의 제조)

  • Jun, Bon-Keun;Lee, Suk-Hyun;Lee, Jung-Hee;Lee, Yong-Hyun
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.37 no.1
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    • pp.1-7
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    • 2000
  • In this paper, we present n-channel GaAs MOSFET having $Al_2O_3$ as gate in insulator fabricated on a semi-insulating GaAs substrate. 1 ${\mu}$m thick undoped GaAs buffer layer, 1500 ${\AA}$ thick n-type GaAs, undoped 500 ${\AA}$ thick AlAs layer, and 50 ${\AA}$ GaAs caplayer were subsequently grown by molecular beam epitaxy(MBE) on (100) oriented semi-insulating GaAs substrate oxidized. When it was wet oxidized, AlAs layer was fully converted $Al_2O_3$. The I-V, $g_m$, breakdown charateristics of the fabricated GaAs MOSFET showed that wet thermal oxidation of AlAs/GaAs epilayer/S${\cdot}$I GaAs was suitable in realizing depletion mode GaAs MOSFET.

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Operating characteristics of Floating Gate Organic Memory (플로팅 게이트형 유기메모리 동작특성)

  • Lee, Boong-Joo
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.15 no.8
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    • pp.5213-5218
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    • 2014
  • Organic memory devices were made using the plasma polymerization method. The memory device consisted of ppMMA(plasma polymerization MMA) thin films as the tunneling and insulating layer, and a Au thin film as the memory layer, which was deposited by thermal evaporation. The organic memory operation theory was developed according to the charging and discharging characteristics of floating gate type memory, which would be measured by the hysteresis voltage and memory voltage with the gate voltage values. The I-V characteristics of the fabricated memory device showed a hysteresis voltage of 26 [V] at 60 ~ -60 [V] double sweep measuring conditions. The programming voltage was applied to the gate electrode in accordance with the result of this theory. A programming voltage of 60[V] equated to a memory voltage of 13[V], and 80[V] equated to a memory voltage of 18[V]. The memory voltage of approximately 40 [%]increased with increasing programming voltage. The charge memory layer charging or discharging according to the theory of the memory was verified experimentally.

a-Si:H TFT Using Ferroelectrics as a Gate Insulator

  • Hur, Chang-Wu;Kung Sung;Jung-Soo, Youk;Sangook Moon;Kim, Jung-Tae
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2004.05a
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    • pp.53-56
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    • 2004
  • The a-Si:H TFT using ferroelectric of SrTi $O_3$as a gate insulator is fabricated on glass. Dielectric characteristics of ferroelectric are superior to $SiO_2$and S $i_3$ $N_4$. Ferroelctric increases on-current, decreases thresh old voltage of TFT and also improves breakdown characteristics. The a-SiN:H has optical band gap of 2.61 eV, refractive index of 1.8~2.0 and resistivity of 10$^{13}$ - 10$^{15}$ $\Omega$cm, respectively. Insulating characteristics of ferroelectrics are excellent because dielectric constant of ferroelectric is about 60~100 and breakdown strength is over 1MV/cm. TFT using ferroelectric has channel length of 8~20${\mu}{\textrm}{m}$ and channel width of 80~200${\mu}{\textrm}{m}$. And it shows that drain current is 3.4$mutextrm{A}$ at 20 gate voltage, $I_{on}$ / $I_{off}$ is a ratio of 10$^{5}$ - 10$^{8}$ and $V_{th}$ is 4~5 volts, respectively. In the case of TFT without ferroelectric, it indicates that the drain current is 1.5 $mutextrm{A}$ at 20 gate voltage and $V_{th}$ is 5~6 volts. With the improvement of the ferroelectric thin film properties, the performance of TFT using this ferroelectric has advanced as a gate insulator fabrication technology is realized.zed.d.

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The hysteresis characteristic of Feedback field-effect transistors with fluctuation of gate oxide and metal gate (게이트 절연막과 게이트 전극물질의 변화에 따른 피드백 전계효과 트랜지스터의 히스테리시스 특성 확인)

  • Lee, Kyungsoo;Woo, Sola;Cho, Jinsun;Kang, Hyungu;Kim, Sangsig
    • Journal of IKEEE
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    • v.22 no.2
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    • pp.488-490
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    • 2018
  • In this study, we propose newly designed feedback field-effect transistors that utilize the positive feedback of charge carriers in single-gated silicon channels to achieve steep switching behaviors. The band diagram, I-V characterisitcs, subthreshold swing, and on/off current ratio are analyzed using a commercial device simulator. To demonstrate the changing characteristics of hysteresis, one of the important features of the feedback field effect transistor, we simulated changing the gate insulating material and the gate metal electrode. The fluctuation in the characteristics changed the $V_{TH}$ of the hysteresis and showed a decrease in width of the hysteresis.

Organic Thin Film Transistors with Cross-Linked PVP Gates (Cross-Linked PVP 게이트 유기 박막트랜지스터)

  • Jang Ji-Geun;Oh Myung-Hwan;Chang Ho-Jung;Kim Young-Seop;Lee Jun-Young;Gong Myoung-Seon;Lee Young-Kwan
    • Journal of the Microelectronics and Packaging Society
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    • v.13 no.1 s.38
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    • pp.37-42
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    • 2006
  • The preparation and processing of PVP-gate insulators on the device performance have been studied in the fabrication of organic thin film transistors (OTFTs). One of polyvinyl series, poly-4-vinyl phenol(PVP) was used as a solute and propyleneglycol monomethyl etheracetate(PGMEA) as a solvent in the formation of organic gate solutions. The cross-linking of organic insulators was also attempted by adding the thermosetting material, poly (melamine-co-formaldehyde) as a hardener in the compounds. From the measurements of electrical insulating characteristics of metal-insulator-metal (MIM) samples, PVP-based insulating layers showed lower leakage current according to the increase of concentration of PVP and poly (melamine-co-formaldehyde) to PGMEA in the formation of organic solutions. The PVP(20 wt%) copolymer with composition of 20 wt% PVP to PGMEA and cross-linked PVPs in which 5 wt% and 10 wt% poly (melamine-co-formaldehyde) hardeners had been additional]y mixed into PVP(20 wt%) copolymers were used as gate dielectrics in the fabrication of OTFTs, respectively. In our experiments, the maximum field effect mobility of $0.31cm^2/Vs$ could be obtained in the 5 wt% cross-linked PVP(20 wt%) device and the highest on/off current ratio of $1.92{\times}10^5$ in the 10 wt% cross-linked PVP(20 wt%) device.

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Fabrication of Triode Type Field Emission Device Using Carbon Nanotubes Synthesized by Thermal Chemical Vapor Deposition (열 화학 기상 증착법을 이용한 삼극관 구조의 탄소 나노 튜브 전계 방출 소자의 제조)

  • Yu W. J.;Cho Y. S.;Choi G. S.;Kim D. J.
    • Korean Journal of Materials Research
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    • v.14 no.8
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    • pp.542-546
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    • 2004
  • We report a new fabrication process for high performance triode type CNT field emitters and their superior electrical properties. The CNT-based triode-type field emitter structure was fabricated by the conventional semiconductor processes. The keys of the fabrication process are spin-on-glass coating and trim-and-leveling of the carbon nanotubes grown in trench structures by employing a chemical mechanical polishing process. They lead to strong adhesion and a uniform distance from the carbon nanotube tips to the electrode. The measured emission property of the arrays showed a remarkably uniform and high current density. The gate leakage current could be remarkably reduced by coating of thin $SiO_{2}$ insulating layer over the gate metal. The field enhancement factor(${\beta}$) and emission area(${\alpha}$) were calculated from the F-N plot. This process can be applicable to fabrication of high power CNT vacuum transistors with good electrical performance.

Characteristics of Circular β-Ga2O3 MOSFETs with High Breakdown Voltage (>1,000 V) (높은 항복전압(>1,000 V)을 가지는 Circular β-Ga2O3 MOSFETs의 특성)

  • Cho, Kyu Jun;Mun, Jae-Kyong;Chang, Woojin;Jung, Hyun-Wook
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.33 no.1
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    • pp.78-82
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    • 2020
  • In this study, MOSFETs fabricated on Si-doped, MBE-grown β-Ga2O3 are demonstrated. A Si-doped Ga2O3 epitaxial layer was grown on a Fe-doped, semi-insulating 1.5 cm × 1 cm Ga2O3 substrate using molecular beam epitaxy (MBE). The fabricated devices are circular type MOSFETs with a gate length of 3 ㎛, a source-drain spacing of 20 ㎛, and a gate width of 523 ㎛. The device exhibited a good pinch-off characteristic, a high on-off drain current ratio of approximately 2.7×109, and a high breakdown voltage of 1,080 V, which demonstrates the potential of Ga2O3 for power device applications including electric vehicles, railways, and renewable energy.