• Journal of Korean Society of Industrial and Systems Engineering
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• v.11 no.17
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• pp.15-23
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• 1988

The subject in this paper is to apply the ellipsoid method proposed by khachiyan〔1〕 to ILP systems. For solving ILP problems we will present a algorithm using the modified formular of Pallaschke〔2〕. Additionally, computational results indicate that out algorithm is subject to the numerical stability.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.16 no.3
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• pp.137-144
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• 2016

In this paper, we have proposed a circuit complexity optimization ILP algorithm of high-level synthesis system for new multiprocessor design. We have analyzed to the operator characteristics and structure of datapath in the most important high-level synthesis. We also introduced the concept of virtual operator for the scheduling of multi-cycle operations. Thus, we demonstrated the complexity to implement a multi-cycle operation of the operator, regardless of the type of operation that can be applied for commonly use in the ILP algorithm. We have achieved is that standard benchmark model for the scheduling of the 5th digital wave filter, it was exactly the same due to the existing datapath scheduling results.

• The Transactions of the Korea Information Processing Society
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• v.5 no.1
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• pp.202-214
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• 1998

Exploitation of instruction-level parallelism(ILP) is an effective mechanism for improving the performance of modern super-scalar and VLIW processors. Various software techniques can be applied to increase ILP. Among these techniques, predicated execution is the one that increases the degree of ILP by allowing instructions from different basic blocks to be converted to a single basic block by removing branch instructions. In this paper, a global predicate-sensitive scheduling algorithm is proposed to improve the performance for ILP processors that support predicated execution. In order to examine the performance of proposed algorithm, a C compiler and a simulator are developed. By simulating various benchmark programs with the compiler and the simulator, the performance results of this algorithm are measured and the effectiveness of the algorithm is verified. As a result of measure performance with I, 2, 4 issue execution, this study was confirmed average performance by 20% or more.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.6 s.336
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• pp.49-58
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• 2005

In this paper, we propose an optimal ILP scheduling algorithm for multiprocessor design on LDFG(Linear Data-Flow Graph) that can be represented by homogeneous synchronous data-flow. The proposed computation in this paper does not contain data-dependent, all scheduling decisions for such algorithms can be taken at compile time, only fully static overlapped schedules are considered. It means that all linear have the same schedule and the same processor assignment. In this paper, the resource-constrained problem is addressed, for the LDFG optimization for multiprocessor design problem formulating ILP solution available to provide optimal solution. The results show that the scheduling method is able to find good quality schedules in reasonable time.

• KIPS Transactions on Computer and Communication Systems
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• v.2 no.2
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• pp.59-66
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• 2013

In this paper, we proposed an optimal ILP algorithm on memory address code generation for DSP in embedded system. This paper using 0-1 ILP formulations DSP address generation units should minimize the memory variable data layout. We identify the possibility of the memory assignment of variable based on the constraints condition, and register the address code which a variable instructs in the program pointer. If the process sequence of the program is declared to the program pointer, then we apply the auto-in/decrement mode about the address code of the relevant variable. And we minimize the loads on the address registers to optimize the data layout of the variable. In this paper, in order to prove the effectiveness of the proposed algorithm, FICO Xpress-MP Modeling Tools were applied to the benchmark. The result that we apply a benchmark, an optimal memory layout of the proposed algorithm then the general declarative order memory on the address/modify register to reduce the number of loads, and reduced access to the address code. Therefor, we proved to reduce the execution time of programs.

• Journal of Communications and Networks
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• v.9 no.2
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• pp.198-209
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• 2007

This paper provides a thorough study on shared segment protection (SSP) for mesh communication networks in the complete routing information scenario, where the integer linear program (ILP) in [1] is extended such that the following two constraints are well addressed: (a) The restoration time constraint for each connection request, and (b) the switching/merging capacity constraint at each node. A novel approach, called SSP algorithm, is developed to reduce the extremely high computation complexity in solving the ILP formulation. Basically, our approach is to derive a good approximation on the parameters in the ILP by referring to the result of solving the corresponding shared path protection (SPP) problem. Thus, the design space can be significantly reduced by eliminating some edges in the graphs. We will show in the simulation that with our approach, the optimality can be achieved in most of the cases. To verify the proposed formulation and investigate the performance impairment in terms of average cost and success rate by the additional two constraints, extensive simulation work has been conducted on three network topologies, in which SPP and shared link protection (SLP) are implemented for comparison. We will demonstrate that the proposed SSP algorithm can effectively and efficiently solve the survivable routing problem with constraints on restoration time and switching/merging capability of each node. The comparison among the three protection types further verifies that SSP can yield significant advantages over SPP and SLP without taking much computation time.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.1213-1216
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• 2005

In this paper, we suggested the integer linear programming (ILP) models that went through constraint scheduling to simple cycle operation during the delay time. The delayed scheduling can determine a schedule with a near-optimal number of control steps for given fixed hardware constraints. In this paper, the resource-constrained problem is addressed, for the DFG optimization for multiprocessor design problem, formulating ILP solution available to provide optimal solution. The results show that the scheduling method is able to find good quality schedules in reasonable time.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.5 no.4
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• pp.626-648
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• 2011

Energy consumption of wireless access networks is in permanent increase, which necessitates development of more energy-efficient network management approaches. Such management schemes must result with adaptation of network energy consumption in accordance with daily variations in user activity. In this paper, we consider possible energy savings of wireless local area networks (WLANs) through development of a few integer linear programming (ILP) models. Effectiveness of ILP models providing energy-efficient management of network resources have been tested on several WLAN instances of different sizes. To cope with the problem of high computational time characteristic for some ILP models, we further develop several heuristic algorithms that are based on greedy methods and local search. Although heuristics obtains somewhat higher results of energy consumption in comparison with the ones of corresponding ILP models, heuristic algorithms ensures minimization of network energy consumption in an amount of time that is acceptable for practical implementations. This confirms that network management algorithms will play a significant role in practical realization of future energy-efficient network management systems.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.11B
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• pp.663-672
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• 2007

This paper proposes an algorithm for design of a multiple ring network that can be applied to an arbitrary topology in the WDM optical transport networks. Especially, we suggest an integer linear program(ILP) formulation with the objective of minimizing the total cost of nodes based on the reconfigurable OADM(ROADM) architecture and propose a heuristic algorithm to reduce computational complexity of the exact problem formulation. To evaluate the performance and validity of this scheme, we applied it to an NSFnet topology assuming the dynamic or static traffic condition and compared it with a mesh methodology about capacity of connection requests and the total cost of the nodes.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.15 no.12
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• pp.4364-4384
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• 2021

The dynamic network state and the mobility of the terminals make the service function chain (SFC) orchestration mechanisms based on static and deterministic assumptions hard to be applied in SDN/NFV mobile edge computing networks. Designing dynamic and online SFC orchestration mechanism can greatly improve the execution efficiency of compute-intensive and resource-hungry applications in mobile edge computing networks. In order to increase the overall profit of service provider and reduce the resource cost, the system running time is divided into a sequence of time slots and a dynamic orchestration scheme based on an improved column generation algorithm is proposed in each slot. Firstly, the SFC dynamic orchestration problem is formulated as an integer linear programming (ILP) model based on layered graph. Then, in order to reduce the computation costs, a column generation model is used to simplify the ILP model. Finally, a two-stage heuristic algorithm based on greedy strategy is proposed. Four metrics are defined and the performance of the proposed algorithm is evaluated based on simulation. The results show that our proposal significantly provides more than 30% reduction of run time and about 12% improvement in service deployment success ratio compared to the Viterbi algorithm based mechanism.