• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.11 no.2
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• pp.189-194
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• 2018

Nowadays most integrated circuits are built using the bulk CMOS technology, but it has much difficulty in further reduction of the power consumption and die size. As a super low-power technology to solve such problems, the SOI technology attracts great attention recently. In this paper, the study results of the temperature dependency of the hot carrier effects in the n-channel MOSFETs fabricated on the thin SOI substrate were discussed. In spite that the devices employed the LDD structure, the hot carrier effects were more serious than expected due to the high series resistance between the channel region and the substrate contact to the ground, and were found to be less serious for the higher temperature with the more phonon scattering in the channel region, which resulted in reducing the hot electron generation.

• JSTS:Journal of Semiconductor Technology and Science
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• v.17 no.1
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• pp.94-100
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• 2017

Stress drain bias dependent current model is proposed for sub-70-nm p-channel metal-oxide semiconductor field-effect transistors (pMOSFETs) under drain-avalanche-hot-carrier (DAHC-) mechanism. The proposed model describes the both on-current and off-current degradation by using two device parameters: channel length variation (${\Delta}L_{ch}$) and threshold voltage shift (${\Delta}V_{th}$). Also, it is a simple and effective model of predicting reliable circuit operation and standby power consumption.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.14 no.2
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• pp.47-49
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• 2004

Gate protection $SiN_x$ as an alternative to a conventional re-oxidation process in Dynamic Random Access Memory devices is investigated. This process can not only protect the gate electrode tungsten against oxidation, but also save the thermal budget due to the re-oxidation. The protection $SiN_x$ process is applied to the poly-Si gate, and its device performance is measured and compared with the re-oxidation processed poly-Si gate. The results on the gate dielectric integrity show that etch damage-curing capability of protection $SiN_x$ is comparable to the re-oxidation process. In addition, the hot carrier immunity of the $SiN_x$ deposited gate is superior to that of re-oxidation processed gate.

• Proceedings of the KIEE Conference
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• 1998.07d
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• pp.1327-1329
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• 1998

It is very important to select superior inter-layer PMD(Pre Metal Dielectric) materials which can act as penetration barrier to various impurities created by CMP processes. In this paper, hot carrier degradation and device characteristics were studied with material variation of PMD-1 layers, which were split by LP-TEOS, SR-Oxide, PE-Oxynitride, PE-Nitride, PE-TEOS films. It was observed that the oxynitride and nitride using plasma was greatly decreased in hot carrier effect in comparison with silicon oxide. Consequently, silicon oxide turned out to be a better PMD-1 material than PE-oxynitride and PE-nitride. Also, LP-TEOS film was the best PMD-1 material Among the silicon oxides.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.14 no.11
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• pp.869-873
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• 2001

The effects of alternate bias stress on p-channel poly-Si TFT\`s has been systematically investigated. We alternately applied positive and negative bias stress on p-channel poly-Si TFT\`s, device Performance(V$\_$th/, g$\_$m/, leakage current, S-slope) are alternately appeared to be increasing and decreasing. It has been shown that device performance degrade under the negative bias stress while improve under the positive bias stress. This effects have been related to the hot carrier injection into the gate oxide rather than the generation of defect states within the poly-Si/SiO$_2$ interface under alternate bias stress.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.07a
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• pp.273-280
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• 2002

The stochiometric mix of evaporating materials for the CuGaTe$_2$ single crystal thin films was prepared from horizontal furnance. For extrapolation method of X-ray diffraction patterns for the CuGaTe$_2$ polycrystal, it was found tetragonal structure whose lattice constant a$\_$0/ and c$\_$0/ were 6.025 ${\AA}$ and 11.931 ${\AA}$, respectively. To obtain the single crystal thin films, CuGaTe$_2$ mixed crystal was deposited on throughly etched semi-insulator GaAs(100) substrate by the Hot Wall Epitaxy (HWE) system. The source and substrate temperature were 670 $^{\circ}C$ and 410 $^{\circ}C$ respective1y, and the thickness of the single crystal thin films is 2.1 $\mu\textrm{m}$. The crystalline structure of single crystalthin films was investigated by the photoluminescence and double crystal X-ray diffraction (DCXD). Hall effect on this sample was measured by the method of van der Pauw and studied on carrier density and mobility dependence on temperature. The carrier density and mobility of CuGaTe$_2$ single crystal thin films deduced from Hall data are 8.72${\times}$10$\^$23/㎥, 3.42${\times}$10$\^$-2/㎡/V$.$s at 293K, respectively. From the photocurrent spectrum by illumination of perpendicular light on the c - axis of the CuGaTe$_2$ single crystal thin film, we have found that the values of spin orbit coupling Δs.o and the crystal field splitting Δcr were 0.0791 eV and 0/2463eV at 10K, respectively. From the PL spectra at 10K, the peaks corresponding to free bound excitons and D-A pair and a broad emission band due to SA is identified. The binding energy of the free excitons are determined to be 0.0470eV and the dissipation energy of the donor -bound exciton and acceptor-bound exciton to be 0.0490eV, 0.00558eV, respectively.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.14 no.10
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• pp.792-795
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• 2001

we present a electrical transport(resistivity, Hall effect) measurements in varying temperature ranges between 78K and 300K on HoSi$_2$ composites by hot-pressed sintering. It has been found that this sintered HoSi$_2$ has a orthorhombic structure, and lattices constant is a=9.8545$\AA$, b=7.7935$\AA$, c=7.8071$\AA$. The measured electrical resistivity is about 1.608$\Omega$ cm and carrier mobility is about 6.9$\times$10$^{1}$cm $^{2}$V.sec at low room temperature. The Hall effect shows a n-type conductivity in the sintered HoSi$_2$.

• Korean Journal of Materials Research
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• v.14 no.7
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• pp.516-521
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• 2004

We applied a deuterium plasma treatment to the surface of polycrystalline silicon films using PECVD and observed the change with AFM, XRD, ET-IR, and SIMS measurement. A bias temperature stressing (BTS) test was carried out to evaluate the reliability of the thin-film transistors (TFT). TFTs with channel lengths as small as 2 ${\mu}m$ were electrically stressed fer up to 1000 sec at room temperature. From the parameter variation such as s-factor, leakage current and on/off ratio, we suggest that the deuterium plasma treatment suppress the hot carrier effect and improve the stability of TFTs.

• Journal of Sensor Science and Technology
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• v.31 no.1
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• pp.41-44
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• 2022

In this study, we have fabricated and characterized vertical double-gate (DG) InGaAs tunnel field-effect-transistors (TFETs) with Al₂O₃/HfO₂ = 1/5 nm bi-layer gate dielectric by employing a top-down approach. The device exhibited excellent characteristics including a minimum subthreshold swing of 60 mV/decade, a maximum transconductance of 141 µS/㎛, and an on/off current ratio of over 10³ at 20℃. Although the TFETs were fabricated using a dry etch-based top-down approach, the values of DIBL and hysteresis were as low as 40 mV/V and below 10 mV, respectively. By evaluating the effects of constant voltage and hot carrier injection stress on the vertical DG InGaAs TFET, we have identified the dominant charge trapping mechanism in TFETs.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.06a
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• pp.121-122
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• 2007

Single crystal $CuAlSe_2$ layers were grown on thoroughly etched sem-insulating GaAs(l00) substrate at $410^{\circ}C$ with hot wall epitaxy (HWE) system by evaporating $CuAlSe_2$ source at $680^{\circ}C$. The crystalline structure of the single crystal thin films was investigated by the photoluminescence and double crystal X-ray diffraction (DCXD). The carrier density and mobility of single crystal $CuAlSe_2$ thin films measured with Hall effect by van der Pauw method are $9.24{\times}l0^{16}\;cm^{-3}$ and $295\;cm^2/V{\cdot}s$ at 293K, respectively. The temperature dependence of the energy band gap of the $CuAlSe_2$ obtained from the absorption spectra was well described by the Varshni's relation, $E_g(T)\;=\;2.8382\;eV\;-\;(8.68\;{\times}\;10^{-4}\;eV/K)T^2/(T\;+\;155\;K)$.