• 제목/요약/키워드: High-voltage bias

검색결과 449건 처리시간 0.021초

전송 모의실험을 통한 전계흡수 광변조기의 파장왜곡 특성해석 (Chirping Characteristics Analysis of Electroabsorption Modulators by Riber Transmission Simulations)

  • 한섭;김경현;한상국
    • 전자공학회논문지D
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    • 제35D권5호
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    • pp.93-99
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    • 1998
  • The chirping characteristics of InGaAsP electroabsorption modulatiors have been analyzed. The effective .alpha. parameters for large signal modulation were estimated by comparing the pulse shape after fiber transmission with constant chirping assumption.We investigated the structure and the operating condition of the modulator to improve the chirping characteristics. The .alpha. parameters were calculated as the function of wavelength detuning and the bias voltage. To minimize the chirping performance, high bias voltage and a small wavelength detuning and the bias voltage. To minimize the chirping performance, high bias voltage and a small wavelength detuning were preferred. An negative .alpha. value is achieved at the wavelength detuning below 30meV with a proper bias voltage so that pulse compression effect was expected.

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Pulsed Magnet ron Sputtering Deposit ion of DLC Films Part II : High-voltage Bias-assisted Deposition

  • Chun, Hui-Gon;Lee, Jing-Hyuk;You, Yong-Zoo;Ko, Yong-Duek;Cho, Tong-Yul;Nikolay S. Sochugov
    • 한국표면공학회지
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    • 제36권2호
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    • pp.148-154
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    • 2003
  • Short ($\tau$=40 $mutextrm{s}$) and high-voltage ($U_{sub}$=2~8 kV) negative substrate bias pulses were used to assist pulsed magnetron sputtering DLC films deposition. Space- and time-resolved probe measurements of the plasma characteristics have been performed. It was shown that in case of high-voltage substrate bias spatial non-uniformity of the magnetron discharge plasma density greatly affected DLC deposition process. By Raman spectroscopy it was found that maximum percentage of s $p^3$-bonded carbon atoms (40 ~ 50%) in the coating was attained at energy $E_{c}$ ~700 eV per deposited carbon atom. Despite rather low diamond-like phase content these coatings are characterized by good adhesion due to ion mixing promoted by high acceleration voltage. Short duration of the bias pulses is also important to prevent electric breakdowns of insulating DLC film during its growth.wth.

Voltage Clamp Bias를 사용한 고전압 LED Drive IC (A High Voltage LED Drive IC using Voltage Clamp Bias)

  • 박성남;박시홍
    • 한국전기전자재료학회논문지
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    • 제22권7호
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    • pp.559-562
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    • 2009
  • Due to the enormous progress achieved in light emitting diodes (LEDs) LEDs have been become a good solution for lightings. In LED driver for lighting applications, it is required high input voltage to drive more LEDs. Therefore, high-voltage should be changed to low-voltage to supply power for drive IC. In this paper, LED drive IC using voltage clamp bias circuit, it use a hysteretic-buck converter topology was proposed and verified through experiments.

Voltage Clamp Bias를 사용한 고전압 LED Drive IC (A High-voltage LED Drive IC Using a Voltage Clamp Bias)

  • 김성남;박시홍
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2009년도 춘계학술대회 논문집
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    • pp.85-87
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    • 2009
  • Due to the enormous progress in light emitting diodes (LEDs), LEDs have been become a good solution for lightings. In LED driver for lighting applications, it is required a high input voltage to drive more LEDs. Therefore, a high-voltage should be changed to low-voltage to supply power for drive IC. In this paper, a LED drive IC with hysteretic-buck converter topology using a voltage clamp bias circuit was proposed and verified through simulations.

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16 V 급 NMOSFET 소자의 낮은 게이트 전압 영역에서 출력저항 개선에 대한 연구 (Design and Analysis of 16 V N-TYPE MOSFET Transistor for the Output Resistance Improvement at Low Gate Bias)

  • 김영목;이한신;성만영
    • 한국전기전자재료학회논문지
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    • 제21권2호
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    • pp.104-110
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    • 2008
  • In this paper we proposed a new source-drain structure for N-type MOSFET which can suppress the output resistance reduction of a device in saturation region due to soft break down leakage at high drain voltage when the gate is biased around relatively low voltage. When a device is generally used as a switch at high gate bias the current level is very important for the operation. but in electronic circuit like an amplifier we should mainly consider the output resistance for the stable voltage gain and the operation at low gate bias. Hence with T-SUPREM simulator we designed devices that operate at low gate bias and high gate bias respectively without a extra photo mask layer and ion-implantation steps. As a result the soft break down leakage due to impact ionization is reduced remarkably and the output resistance increases about 3 times in the device that operates at the low gate bias. Also it is expected that electronic circuit designers can easily design a circuit using the offered N-type MOSFET device with the better output resistance.

Ku-Band Power Amplifier MMIC Chipset with On-Chip Active Gate Bias Circuit

  • Noh, Youn-Sub;Chang, Dong-Pil;Yom, In-Bok
    • ETRI Journal
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    • 제31권3호
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    • pp.247-253
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    • 2009
  • We propose a Ku-band driver and high-power amplifier monolithic microwave integrated circuits (MMICs) employing a compensating gate bias circuit using a commercial 0.5 ${\mu}m$ GaAs pHEMT technology. The integrated gate bias circuit provides compensation for the threshold voltage and temperature variations as well as independence of the supply voltage variations. A fabricated two-stage Ku-band driver amplifier MMIC exhibits a typical output power of 30.5 dBm and power-added efficiency (PAE) of 37% over a 13.5 GHz to 15.0 GHz frequency band, while a fabricated three-stage Ku-band high-power amplifier MMIC exhibits a maximum saturated output power of 39.25 dBm (8.4 W) and PAE of 22.7% at 14.5 GHz.

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Bias 전압에 따른 ZnO:Al 투명전도막의 전기적 특성 (Substrate Bias Voltage Dependence of Electrical Properties for ZnO:Al Film by DC Magnetron Sputtering)

  • 박강일;김병섭;임동건;이수호;곽동주
    • 한국전기전자재료학회논문지
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    • 제17권7호
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    • pp.738-746
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    • 2004
  • Recently zinc oxide(ZnO) has emerged as one of the most promising transparent conducting films with a strong demand of low cost and high performance optoelectronic devices, ZnO film has many advantages such as high chemical and mechanical stabilities, and abundance in nature. In this paper, in order to obtain the excellent transparent conducting film with low resistivity and high optical transmittance for Plasma Display Pannel(PDP), aluminium doped zinc oxide films were deposited on Corning glass substrate by dc magnetron sputtering method. The effects of the discharge power and doping amounts of $Al_2$$O_3$ on the electrical and optical properties were investigated experimentally. Particularly in order to lower the electrical resistivity, positive and negative bias voltages were applied on the substrate, and the effect of bias voltage on the electrical properties of ZnO:Al thin film were also studied and discussed. Films with lowest resistivity of $4.3 \times 10 ^{-4} \Omega-cm$ and good transmittance of 91.46 % have been achieved for the films deposited at 1 mtorr, $400^{\circ}C$, 40 W, Al content of 2 wt% with a substrate bias of +30 V for about 800 nm in film thickness.

Ta 확산 방지막 특성에 미치는 기판 바이어스에 관한 연구 (Study on diffusion barrier properties of Tantalum films deposited by substrate bias voltage)

  • 임재원;배준우
    • 한국진공학회지
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    • 제12권3호
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    • pp.174-181
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    • 2003
  • 본 논문은 탄탈 확산 방지막의 증착시 음의 기판 바이어스에 의한 탄탈막의 특성변화와 열적 안정성에 대해서 고찰하였다. 기판 바이어스를 걸지 않은 경우, 탄탈막은 원주형 모양의 결정 성장을 보이는 주상구조와 250 $\mu\Omega$cm의 높은 비저항값을 보였으나, 기판 바이어스를 걸어줌에 파라서 주상구조가 아닌 치밀한 미세구조와 표면이 평탄한 막이 형성되었고 비저항값도 현저히 감소되었으며, 특히 -125 V에서 증착된 탄탈막은 비저항값이 약 40 $\mu\Omega$cm로 이는 탄탈 벌크의 저항값 (13 $\mu\Omega$cm)에 근접한 값임을 알 수 있었다. 또한, 탄탈 확산 방지막의 열적 안정성에 대해서도, 기판 바이어스를 걸지 않은 탄탈막의 경우 $400^{\circ}C$에서 구리와 실리콘의 반응에 의해 비저항 값이 크게 증가한 결과에 비해, 기판 바이어스에 의해 증착된 탄탈막의 경우 $600^{\circ}C$까지 확산 방지막의 효과를 유지하고 있는 것으로 관찰되었다.

기판 인가 전압에 따른 IWO 박막의 전기적, 광학적 특성 (Influence of Substrate Bias Voltage on the Electrical and Optical Properties of IWO Thin Films)

  • 최재욱;이연학;박민성;공영민;김대일
    • 한국재료학회지
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    • 제33권9호
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    • pp.372-376
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    • 2023
  • Transparent conductive tungsten (W) doped indium oxide (In2O3; IWO) films were deposited at different substrate bias voltage (-Vb) conditions at room temperature on glass substrates by radio frequency (RF) magnetron sputtering and the influence of the substrate bias voltage on the optical and electrical properties was investigated. As the substrate bias voltage increased to -350 Vb, the IWO films showed a lower resistivity of 2.06 × 10-4 Ωcm. The lowest resistivity observed for the film deposited at -350 Vb could be attributed to its higher mobility, of 31.8 cm2/Vs compared with that (6.2 cm2/Vs) of the films deposited without a substrate bias voltage (0 Vb). The highest visible transmittance of 84.1 % was also observed for the films deposited at the -350 Vb condition. The X-ray diffraction observation indicated the IWO films deposited without substrate bias voltage were amorphous phase without any diffraction peaks, while the films deposited with bias voltage were polycrystalline with a low In2O3 (222) diffraction peak and relatively high intensity (431) and (046) diffraction peaks. From the observed visible transmittance and electrical properties, it is concluded that the opto-electrical performance of the polycrystalline IWO film deposited by RF magnetron sputtering can be enhanced with effective substrate bias voltage conditions.

Fabrication and Electrical Transport Characteristics of All-Perovskite Oxide DyMnO3/Nb-1.0 wt% Doped SrTiO3 Heterostructures

  • Wang, Wei Tian
    • 한국재료학회지
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    • 제30권7호
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    • pp.333-337
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    • 2020
  • Orthorhombic DyMnO3 films are fabricated epitaxially on Nb-1.0 wt%-doped SrTiO3 single crystal substrates using pulsed laser deposition technique. The structure of the deposited DyMnO3 films is studied by X-ray diffraction, and the epitaxial relationship between the film and the substrate is determined. The electrical transport properties reveal the diodelike rectifying behaviors in the all-perovskite oxide junctions over a wide temperature range (100 ~ 340 K). The forward current is exponentially related to the forward bias voltage, and the extracted ideality factors show distinct transport mechanisms in high and low positive regions. The leakage current increases with increasing reverse bias voltage, and the breakdown voltage decreases with decrease temperature, a consequence of tunneling effects because the leakage current at low temperature is larger than that at high temperature. The determined built-in potentials are 0.37 V in the low bias region, and 0.11 V in the high bias region, respectively. The results show the importance of temperature and applied bias in determining the electrical transport characteristics of all-perovskite oxide heterostructures.