• 한국정보디스플레이학회:학술대회논문집
• /
• 한국정보디스플레이학회 2006년도 6th International Meeting on Information Display
• /
• pp.1166-1169
• /
• 2006

In this study, the effects of SAMs on the performance of OTFTs have been investigated. ALD technique was applied for the deposition of SAMs, which is an ultra-thin film deposition technique based on sequences of self-limiting surface reactions enabling thickness control on atomic scale. According to our investigation results, it is observed that the surface properties of the gate insulator was changed by SAMs, which allow pentacene molecules to be deposited in the upright direction on the gate insulator and hence the performance of OTFTs could be improved. These results will be discussed

• 한국정보디스플레이학회:학술대회논문집
• /
• 한국정보디스플레이학회 2002년도 International Meeting on Information Display
• /
• pp.575-578
• /
• 2002

In this work, the electrical characteristics of organic thin film transistors with the surface-treated organic gate insulator have been studied. For the surface treatment, the photoalignment technique was used. The field effect mobilities of the devices with PVP gate insulator was improved about ten times as high as those of TFTs without the insulator surface treatment.

• 한국정보디스플레이학회:학술대회논문집
• /
• 한국정보디스플레이학회 2004년도 Asia Display / IMID 04
• /
• pp.885-888
• /
• 2004

We have prepared and investigated the properties of photoinitiator-free photosensitive polyimide gate insulatos for organic thin-film transistors (OTFTs). The precursor was prepared from a dianhydride, 3,3',4,4'-Benzophenone tetracarboxylic dianhydride (BTDA) and novel aromatic diamine, 7-(3,5-diaminobenzoyloxy) coumarine (DA-CM). Photo-patternability of the polyimide precursor film and surface morphology of the films before and after photo-patterning process were investigated and negative pattern with a resolution of 50 ${\mu}m$ was obtained nicely. In addition, we have fabricated OTFTs with pentacene and photosensitive polyimide as a semiconductor and a gate insulator; respectively. According to the device geometry, the ${\mu}$, current modulation ratio and subthreshold swing of the devices were around 0.2${\sim}$0.4 $cm^2$/Vs, more than $10^5$ and around 3${\sim}$5 V/dec, respectively.

• 한국진공학회:학술대회논문집
• /
• 한국진공학회 2009년도 제36회 동계학술대회 초록집
• /
• pp.269.1-269.1
• /
• 2009

• 한국정보디스플레이학회:학술대회논문집
• /
• 한국정보디스플레이학회 2005년도 International Meeting on Information Displayvol.II
• /
• pp.1364-1369
• /
• 2005

In this paper, we have identified the mechanism of C-V hysteresis behavior often observed in pentacene organic thin-film transistors (OTFTs). The capacitance-voltage (C-V) characteristics were measured for pentacene OTFTs fabricated on glass substrates with MoW as gate/source/drain electrode and TEOS $SiO_2$ as gate insulator. The measurements were made at room temperature and elevated temperatures. From the room temperature measurements, we found that the hysteresis behavior was caused by hole injection into the gate insulator from the pentacene semiconductor for large negative gate voltages, resulting in the negative flat-band voltage shift. However electron injection was observed only at elevated temperatures

• Journal of information and communication convergence engineering
• /
• 제2권2호
• /
• pp.93-96
• /
• 2004

The a-Si:H TFT using ferroelectric of $SrTiO_3$ as a gate insulator is fabricated on glass. Dielectric characteristics of ferroelectric are superior to $SiO_2$ and $Si_{3}N_{4}$. Ferroelectric increases on-current, decreases threshold voltage of TFT and also improves breakdown characteristics. The a-SiN:H has optical band gap of 2.61 eV, retractive index of 1.8∼2.0 and resistivity of $10^{13}$~$10^{15}$ $\Omega$cm, respectively. Insulating characteristics of ferroelectrics are excellent because dielectric constant of ferroelectric is about 60∼100 and breakdown strength is over 1MV/cm. TFT using ferroelectric has channel length of 8∼20 $\mu\textrm{m}$ and channel width of 80∼200 $\mu\textrm{m}$. And it shows that drain current is 3.4$\mu\textrm{A}$ at 20 gate voltage, $I_{on}$/$I_{off}$ is a ratio of $10^5$~$10^8$ and $V_{th}$ is 4∼5 volts, respectively. In the case of TFT without ferroelectric, it indicates that the drain current is 1.5 $\mu\textrm{A}$ at 20 gate voltage and $V_{th}$ is 5∼6 volts. With the improvement of the ferroelectric thin film properties, the performance of TFT using this ferroelectric has advanced as a gate insulator fabrication technology is realized.

• 한국정보디스플레이학회:학술대회논문집
• /
• 한국정보디스플레이학회 2000년도 제1회 학술대회 논문집
• /
• pp.15-16
• /
• 2000

The gate bias stress effect of the hydrogenated amorphous silicon (a-Si:H) thin-film transistors (TFTs) with a $SiN_x/BCB$ gate insulator have been studied. The gate planarization was carried out by spin-coating of BCB (benzocyclobutene) on Cr gates. The BCB exhibits charge trappings during a high gate bias, but the stability of the TFT is the same as conventional one when it is between -25 V and +25 V. The charge trap density in the BCB increases with its thickness.

• 한국진공학회:학술대회논문집
• /
• 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
• /
• pp.344-344
• /
• 2014

Transparent amorphous oxide semiconductors such as a In-Ga-Zn-O (a-IGZO) have advantages for large area electronic devices; e.g., uniform deposition at a large area, optical transparency, a smooth surface, and large electron mobility >10 cm2/Vs, which is more than an order of magnitude larger than that of hydrogen amorphous silicon (a-Si;H).1) Thin film transistors (TFTs) that employ amorphous oxide semiconductors such as ZnO, In-Ga-Zn-O, or Hf-In-Zn-O (HIZO) are currently subject of intensive study owing to their high potential for application in flat panel displays. The device fabrication process involves a series of thin film deposition and photolithographic patterning steps. In order to minimize contamination, the substrates usually undergo a cleaning procedure using deionized water, before and after the growth of thin films by sputtering methods. The devices structure were fabricated top-contact gate TFTs using the a-IGZO films on the plastic substrates. The channel width and length were 80 and 20 um, respectively. The source and drain electrode regions were defined by photolithography and wet etching process. The electrodes consisting of Ti(15 nm)/Al(120 nm)/Ti(15nm) trilayers were deposited by direct current sputtering. The 30 nm thickness active IGZO layer deposited by rf magnetron sputtering at room temperature. The deposition condition is as follows: a rf power 200 W, a pressure of 5 mtorr, 10% of oxygen [O2/(O2+Ar)=0.1], and room temperature. A 9-nm-thick Al2O3 layer was formed as a first, third gate insulator by ALD deposition. A 290-nm-thick SS6908 organic dielectrics formed as second gate insulator by spin-coating. The schematic structure of the IGZO TFT is top gate contact geometry device structure for typical TFTs fabricated in this study. Drain current (IDS) versus drain-source voltage (VDS) output characteristics curve of a IGZO TFTs fabricated using the 3-layer gate insulator on a plastic substrate and log(IDS)-gate voltage (VG) characteristics for typical IGZO TFTs. The TFTs device has a channel width (W) of $80{\mu}m$ and a channel length (L) of $20{\mu}m$. The IDS-VDS curves showed well-defined transistor characteristics with saturation effects at VG>-10 V and VDS>-20 V for the inkjet printing IGZO device. The carrier charge mobility was determined to be 15.18 cm^2 V-1s-1 with FET threshold voltage of -3 V and on/off current ratio 10^9.

• 한국진공학회:학술대회논문집
• /
• 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
• /
• pp.304.2-304.2
• /
• 2016

Hafnium oxide-aluminum oxide (HfO2-Al2O3) dielectric films have been fabricated by Pulsed Laser Deposition (PLD), and their properties are studied in comparison with HfO2 films. As a gate dielectric of the TFT, in spite of its high dielectric constant, HfO2 has a small energy band gap and microcrystalline structure with rough surface characteristics. When fabricated by the device, it has the drawback of generating a high leakage current. In this study, the HfAlO films was obtained by Pulsed Laser Deposition with HfO2-Al2O3 target(chemical composition of (HfO2)86wt%(Al2O3)14wt%). The characteristics of the thin Film have been investigated by x-ray diffraction (XRD), atomic force microscopy (AFM) and spectroscopic ellipsometer (SE) analyses. The X-ray diffraction studies confirmed that the HfAlO has amorphous structure. The RMS value can be compared to the surface roughness via AFM analysis, it showed HfAlO thin Film has more lower properties than HfO2. The energy band gap (Eg) deduced by spectroscopic ellipsometer was increased. HfAlO films was expected to improved the interface quality between channel and gate insulator. Apply to an oxide thin Film Transistors, HfAlO may help improve the properties of device.

• 한국정보디스플레이학회:학술대회논문집
• /
• 한국정보디스플레이학회 2004년도 Asia Display / IMID 04
• /
• pp.1046-1048
• /
• 2004

Performances of organic thin film transistors (OTFTs) can be detrimentally affected by the state of the gate dielectric. Because of the bad stability of polymers, OTFTs with polymer gate dielectrics often provide abnormal characteristics. In this study, we report the condensation effect of the polymer gate dielectric layer. For the observations of the effect of the condensation, the spin-coated polymer layers with various deposition conditions were fabricated and left under low vacuum condition for several days. It is observed that the thickness of polymer layer and the electrical characteristic of OTFTs vary with the condensation time.