• 조명전기설비학회논문지
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• 제25권12호
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• pp.48-53
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• 2011

Polymer thin films were prepared by capacitively coupled plasma polymerization process for application of gate insulator. The polymer thin films revealed to form polymer layers with original properties of the monomer. Among the plasma polymer thin films, the styrene polymer having large number of phenyl sites revealed higher dielectric constant of k=3.7 than that of conventional polymer. The plasma polymerized styrene thin film revealed no hysteresis characteristics and low leakage current density of $1{\times}10^{-8}[Acm^{-2}]$ at field strength of $1[MVcm^{-1}]$, which measured by I-V and C-V measurements using MIM and MIS devices.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2007년도 7th International Meeting on Information Display 제7권2호
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• pp.1295-1297
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• 2007

In this study, we report that the characteristics of OTFTs can be improved by the UV exposure of the surface of the synthesized photo-reactive gate insulator, and be optimized by controlling the exposure time. As a gate dielectric, the modified PVP was prepared by substituting hydroxyl group in PVP with cinnamoyl group. The synthesis details and the effects of the modified PVP on the device performance are discussed.

• Transactions on Electrical and Electronic Materials
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• 제17권6호
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• pp.380-382
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• 2016

The mechanism for instability under PBS (positive bias stress) in amorphous SIZO (Si-In-Zn-O) thin-film transistors was investigated by analyzing the charge trapping mechanism. It was found that the bulk traps in the SIZO channel layer and the channel/dielectric interfacial traps are not created during the PBS duration. This result suggests that charge trapping in gate dielectric, and/or in oxide semiconductor bulk, and/or at the channel/dielectric interface is a more dominant mechanism than the creation of defects in the SIZO-TFTs.

• 한국전기전자재료학회논문지
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• 제19권9호
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• pp.808-812
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• 2006

In this dissertation, Ru-Zr metal gate electrode deposited on two kinds of dielectric were formed for MOS capacitor. Sample co-sputtering method was used as a alloy deposition method. Various atomic composition was achieved when metal film was deposited by controlling sputtering power. To study the characteristics of metal gate electrode, C-V(capacitance-voltage) and I-V(current-voltage) measurements were performed. Work function and equivalent oxide thickness were extracted from C-V curves by using NCSU(North Carolina State University) quantum model. After the annealing at various temperature, thermal/chemical stability was verified by measuring the variation of effective oxide thickness and work function. This dissertation verified that Ru-Zr gate electrodes deposited on $SiO_{2}\;and\;ZrO_{2}$ have compatible work functions for NMOS at the specified atomic composition and this metal alloys are thermally stable. Ru-Zr metal gate electrode deposited on $SiO_{2}\;and\;ZrO_{2}$ exhibit low sheet resistance and this values were varied with temperature. Metal alloy deposited on two kinds of dielectric proposed in this dissertation will be used in company with high-k dielectric replacing polysilicon and will lead improvement of CMOS properties.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2001년도 하계학술대회 논문집
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• pp.45-49
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• 2001

We have investigated physical and electrical properties of the Hf $O_2$/HfS $i_{x}$/ $O_{y}$ thin film for alternative gate dielectrics in the metal-oxide-semiconductor device. The oxidation of Hf deposited directly on the Si substrate results in the H $f_{x}$/ $O_{y}$ interfacial layer and the high-k Hf $O_2$film simultaneously. Interestingly, the post-oxidation N2 annealing of the H102/H1Si70y thin films reduces(increases) the thickness of an amorphous HfS $i_{x}$/ $O_{y}$ layer(Hf $O_2$ layer). This phenomenon causes the increase of the effective dielectric constant, while maintaining the excellent interfacial properties. The hysteresis window in C-V curves and the midgap interface state density( $D_{itm}$) of Hf $O_2$/HfS $i_{x}$/ $O_{y}$ thin films less than 10 mV and ~3$\times$10$^{11}$ c $m^{-2}$ -eV without post-metallization annealing, respectively. The leakage current was also low (1$\times$10-s A/c $m^2$ at $V_{g}$ = +2 V). It is believed that these excellent results were obtained due to existence of the amorphous HfS $i_{x}$/ $O_{y}$ buffer layer. We also investigated the charge trapping characteristics using Fowler-Nordheim electron injection: We found that the degradation of Hf $O_2$/HfS $i_{x}$/ $O_{y}$ gate oxides is more severe when electrons were injected from the gate electrode.e electrode.e.e electrode.e.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2004년도 추계학술대회 논문집 Vol.17
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• pp.207-209
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• 2004

Currently, for satisfying the needs of scaled MOSFET's a high quality thin oxide dielectric is desired because the properties of conventional $SiO_2$ film are not acceptable for these very small sized transistors. As an alternative gate dielectric have drawn considerable alternation due to their superior performance and reliability properties over conventional $SiO_2$, to obtain the superior characteristics of ultra thin dielectric films, $N_2O$ grown thin oxynitride has been proposed as a dielectric growtuanneal ambient. In this study the authors observed process characteristics of $N_2O$ grown thin dielectric. In view points of the process characteristics of MOS capacitor, the sheet resistance of 4.07$[\Omega/sq.]$, the film stress of $1.009e^{10}[dyne/cm^2]$, the threshold voltage$(V_t)$ of 0.39[V], the breakdown voltage(BV[V]) of 11.45[V] was measured in PMOS. I could achieve improved electrical characteristics and reliability for deep submicron MOSFET devices with $N_2O$ thin oxide.

• 전자공학회논문지A
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• 제33A권12호
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• pp.77-82
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• 1996

The breakdown characteristics of metal-oxide-semiconductor(MOS) capacitors fabricated by Al, polysilicon, and tungsten polycide gate electrodes onto gate oxide was evaluated by time zero dielectric breakdwon (TZDB). The average breakdown field of the gate oxide with tungsten polycide electride was lower than that of the polysilicon electrode. The B model (1~8MV/cm) failure of the gate oxide with tungsten polycide electrode was increased with increasing annealing temperature in the dry $O_{2}$ ambient. This is attributed ot fluorine and tungsten diffusion from thungsten silicide film into the gate oxide, and stress increase of tungsten polcide after annealing treatment.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2007년도 7th International Meeting on Information Display 제7권2호
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• pp.1636-1638
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• 2007

We report on low-voltage pentacene TFTs with a Al2O3/OTS as a gate dielectric. Improving device characteristics, we performed chemical modification of self-grown Al2O3 surface with an octadecyltrichlorosilane(OTS) self-assembled monolayer(SAM). As the result of this combination, the mobility was improved from 0.3 to $0.45\;cm^2/Vs$. In addition, we examined that the SAM dipole electric field have an influence on gate leakage current, transfer and output characteristics.

• 한국재료학회:학술대회논문집
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• 한국재료학회 2012년도 춘계학술발표대회
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• pp.110.2-110.2
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• 2012

We reported on antireflective ZnSnO (ZTO)/Ag bilayer and ZTO/Ag/ZTO trilayer source/drain (S/D) electrodes for all-transparent ZTO channel based thin film transistors (TFTs). The ZTO/Ag bilayer is more transparent (83.71%) and effective source/drain (S/D) electrodes for the ZTO channel/Al2O3 gate dielectric/ITO gate electrode/glass structure than ZTO/Ag/ZTO trilayer because the bottom ZTO layer in the trilayer increasea contact resistance between S/D electrodes and ZTO channel layer and reduce the antireflection effect. The ZTO based all-transparent TFTs with ZTO/Ag bilayer S/D electrode showed a saturation mobility of 4.54cm2/Vs and switching property (1.31V/decade) comparable to TTFT with Ag S/D electrodes.

• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 2002년도 추계종합학술대회
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• pp.800-803
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• 2002

The MONOS capacitor are fabricated to investigate the carrier trapping due to Fowler-Nordheim tunneling injection. The carrier trapping in scaled multi-dielectric(ONO) depends on the nitride and Op oxide thickness under Fowler_Nordheim tunneling injection. Carriers captured at nitride film could not escape from nitride to gate, but be captured at top oxide and nitride interface traps because of barrier height of top oxide. Therefore, it is expected that the MONOS memory devices using multi dielectric films enhance memory effect and have a long memory retention characteristic.