• 제목/요약/키워드: GF($2^4$)

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Clarification of Korean Tangerine Juice Using Microfiltration Membrane Process (미세여과 공정을 이용한 제주산 감귤 주스의 청징화)

  • Lee, Eun-Young;Woo, Gun-Jo
    • Korean Journal of Food Science and Technology
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    • v.31 no.2
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    • pp.448-457
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    • 1999
  • Citrus fruits are consumed worldwide due to their unique flavor and nutrition value. It is necessary to remove the haze material as well as to minimize the loss of major compounds such as organic acids, sugars, and ascorbic acid in membrane processes for clarification of juice. The objective of our research was to select the best membrane among one surface filter (Whatman No.4) and five microfiltration filters (GF/A, GF/D, GF/F, Gelman, and SM). Tangerine fresh blended with three times of water was partially clarified with 170 mesh followed by prefiltration in a Samduck filtration system. The best membrane was selected by measuring the amounts of major compounds in the permeates as well as the flux which were statistically analyzed with SAS program. The foulants on the membrane surface were observed by SEM. The flux of GF/A and GF/F decreased with time at probability 0.10. Gelman, SM, and GF/D maintained the stable flux. Gelman showed the highest total scores including nutritive value (the amounts of citrate, malate, and ascorbic acid) and purchasing need (brix and color). Therefore, the microfiltration membrane process was a very effective method in tangerine juice clarification and Gelman type A/E was proved to be the best membrane among the five microfiltration membranes.

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Syntheses and realization of Quaternary Galois Field Sum-Of-Product(QGFSOP) expressed 1-variable functions Permutational Literals (치환리터럴에 의한 Quaternary Galois Field Sum-Of-Product(QGFSOP)형 1-변수 함수의 합성과 실현)

  • Park, Dong-Young;Kim, Baek-Ki;Seong, Hyeun-Kyeong
    • Journal of Advanced Navigation Technology
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    • v.14 no.5
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    • pp.710-717
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    • 2010
  • Even though there are 256 possible 1-qudit(1-variable quantum digit) functions in quaternary logic, the most useful functions are 4!=24 ones capable of representing in QGFSOP expressions by possible permuting of 0,1,2, and 3. In this paper, we propose a permutational literal(PL) representation and a QPL(Quaternary PL) gate which use the operands of a multiplicand A and an augend D in $Ax^C$+D(GF4) operation as a control variable of multi-cascaded PLs. And we also present new PL synthesis algorithms to synthesize QGFSOP expressed 24 (1-qudit) functions by applying three PL operators as ab(mutual permutation), + D(addition), and XA (multiplication). Finally architectures, circuits, and a CMOS implementation to realize proposed PL synthesis algorithms for $Ax^C$+D(GF4) functions are presented.

A Study on Functional components, antioxidant activity of Gastrodiae Rhizoma and Gastrodiae Elata floral axis (천마의 근경과 지상부의 성분 및 항산화 활성 연구)

  • Park, Jang-Pill;Lee, Soong-In;Jeong, Jong-Kil
    • The Korea Journal of Herbology
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    • v.30 no.1
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    • pp.19-24
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    • 2015
  • Objectives : This study was carried out to know the necessity of freezing and boiling process of Gastrodiae Rhizoma. Also we need to evaluate Gastrodia elata floral axis as a product ingridients. Methods : Frozen Gastrodiae Rhizoma (GF1, GF2) and Gastrodia elata floral axis (GFA) were prepared. They were divided into samples (GF1 : frozen at the freezer, GF2; frozen and boiled for 10 hours, GFA; dried at 7 $0^{\circ}C$ for 120 hours) for experiment. They were extracted using water, freeze dried and powdered. And we analyzed proximate compositions, free sugars, gastrodin, p-hydroxybenzyl alcohol and p-hydroxybenzyl aldehyde content, phenolic and flavonoid, electron donating ability and nitrate scavenging activity and antioxidant activity. Results : In moisture, crude ash, fructose, glucose, sucrose, p-Hydroxybenzyl alcohol GF2 showed lower level than GF1. But GF2 showed higher content than GF1, in crude fat (0.8% > 0.19%), gastrodin ($8.84{\pm}0.58%$ > $4.18{\pm}0.73%$), and p-hydroxybenzyl aldehyde ($2.45{\pm}0.26%$ > $2.07{\pm}0.16%$) content, phenolic ($9.98{\pm}0.07%$ > $3.35{\pm}0.03%$) and flavonoid ($3.01{\pm}0.06%$ > $1.09{\pm}0.04%$) content, electro donating ability ($15.21{\pm}6.51%$ > $10.44{\pm}4.78%$), nitrate scavening activity ($20.43{\pm}5.30%$ > $13.62{\pm}5.78%$). GFA has a relatively lower key indicators component, but has a enough impact on antioxidant effect in phenolic ($11.85{\pm}0.08%$) and flavonoid content ($1.45{\pm}0.03%$), electron donating ability ($18.58{\pm}9.06%$) and nitrate scavenging activity ($19.41{\pm}9.90%$). Conclusions : In the view of proximate compositions, free sugars, functional component and antioxidant activity, the results indicated that boiling process is effective for the frozen Gastrodiae Rhizoma. And Gastrodia elata floral axis has a significantly functional components and antioxidant activity.

On Implementations of Algorithms for Fast Generation of Normal Bases and Low Cost Arithmetics over Finite Fields (유한체위에서 정규기저의 고속생성과 저비용 연산 알고리즘의 구현에 관한 연구)

  • Kim, Yong-Tae
    • The Journal of the Korea institute of electronic communication sciences
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    • v.12 no.4
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    • pp.621-628
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    • 2017
  • The efficiency of implementation of the arithmetic operations in finite fields depends on the choice representation of elements of the field. It seems that from this point of view normal bases are the most appropriate, since raising to the power 2 in $GF(2^n)$ of characteristic 2 is reduced in these bases to a cyclic shift of the coordinates. We, in this paper, introduce our algorithm to transform fastly the conventional bases to normal bases and present the result of H/W implementation using the algorithm. We also propose our algorithm to calculate the multiplication and inverse of elements with respect to normal bases in $GF(2^n)$ and present the programs and the results of H/W implementations using the algorithm.

VLSI Design of an Improved Structure of a $GF(2^m)$ Divider (확장성에 유리한 병렬 알고리즘 방식에 기반한 $GF(2^m)$나눗셈기의 VLSI 설계)

  • Moon San-Gook
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.9 no.3
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    • pp.633-637
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    • 2005
  • In this contribution, we developed and improved an existing GF (Galois field) dividing algorithm by suggesting a novel architecture for a finite field divider, which is frequently required for the error correction applications and the security-related applications such as the Reed-Solomon code, elliptic curve encryption/ decryption, is proposed. We utilized the VHDL language to verify the design methodology, and implemented the architecture on an FPGA chip. We suggested the n-bit lookup table method to obtain the throughput of 2m/n cycles, where m is the order of the division polynomial and n is the number of the most significant lookup-bits. By doing this, we extracted the advantages in achieving both high-throughput and less cost of the gate areaon the chip. A pilot FPGA chip was implemented with the case of m=4, n=2. We successfully utilized the Altera's EP20K30ETC144-1 to exhibit the maximum operating clock frequency of 77 MHz.

Low Latency Systolic Multiplier over GF(2m) Using Irreducible AOP (기약 AOP를 이용한 GF(2m)상의 낮은 지연시간의 시스톨릭 곱셈기)

  • Kim, Kee-Won;Han, Seung-Chul
    • IEMEK Journal of Embedded Systems and Applications
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    • v.11 no.4
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    • pp.227-233
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    • 2016
  • Efficient finite field arithmetic is essential for fast implementation of error correcting codes and cryptographic applications. Among the arithmetic operations over finite fields, the multiplication is one of the basic arithmetic operations. Therefore an efficient design of a finite field multiplier is required. In this paper, two new bit-parallel systolic multipliers for $GF(2^m)$ fields defined by AOP(all-one polynomial) have proposed. The proposed multipliers have a little bit greater space complexity but save at least 22% area complexity and 13% area-time (AT) complexity as compared to the existing multipliers using AOP. As compared to related works, we have shown that our multipliers have lower area-time complexity, cell delay, and latency. So, we expect that our multipliers are well suited to VLSI implementation.

A Study on Implementation of Multiple-Valued Arithmetic Processor using Current Mode CMOS (전류모드 CMOS에 의한 다치 연산기 구현에 관한 연구)

  • Seong, Hyeon-Kyeong;Yoon, Kwang-Sub
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.36C no.8
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    • pp.35-45
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    • 1999
  • In this paper, the addition and the multiplicative algorithm of two polynomials over finite field $GF(p^m)$ are presented. The 4-valued arithmetic processor of the serial input-parallel output modular structure on $GF(4^3)$ to be performed the presented algorithm is implemented by current mode CMOS. This 4-valued arithmetic processor using current mode CMOS is implemented one addition/multiplication selection circuit and three operation circuits; mod(4) multiplicative operation circuit, MOD operation circuit made by two mod(4) addition operation circuits, and primitive irreducible polynomial operation circuit to be performing same operation as mod(4) multiplicative operation circuit. These operation circuits are simulated under $2{\mu}m$ CMOS standard technology, $15{\mu}A$ unit current, and 3.3V VDD voltage using PSpice. The simulation results have shown the satisfying current characteristics. The presented 4-valued arithmetic processor using current mode CMOS is simple and regular for wire routing and possesses the property of modularity. Also, it is expansible for the addition and the multiplication of two polynomials on finite field increasing the degree m and suitable for VLSI implementation.

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Clothing Pressure of selected Support Panty Stockings

  • Park, Jeong-Eun;Sung, Su-Kwang;Song, Min-Kyu
    • Fashion & Textile Research Journal
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    • v.2 no.5
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    • pp.430-436
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    • 2000
  • The purpose of the study was to obtain the basic data on the self-adjusting ability of the support panty stockings. Ten healthy women in the twenties were selected as subjects and clothing pressure of 9 support panty stockings made of single covered yarn (SCY) and double covered yarn (DCY) were measured under the standard environmental condition for the study. Data was analysed statistically according to body postures, sides, and parks. The results were as follows: Clothing pressure according to body posture was order of 'sitting-on-a-chair', 'stepping-up-a-stair', and 'standing'. High clothing pressure was obtained in the parts of calf ($9.4gf/cm^2$) in 'standing' and knee (9.7 and $16.5gf/cm^2$) in both 'stepping-up-a-stair' and 'sitting-on-a-chair', respectively. The order of clothing pressure with body sides was 'front', 'side', and 'back'. The highest clothing pressure was knee ($18.8gf/cm^2$) on the front, thigh ($8.8gf/cm^2$) on the side, and calf ($6.4gf/cm^2$) on the back. Clothing pressure of DCY at abdomen and knee was a little higher than those of SCY 3. In terms of material structure variation, clothing pressure of thigh, calf and ankle with SCY was a little higher than those with DCY, while clothing pressure of abdomen and knee with DCY was a little higher than those with SCY.

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Effect of Post-Annealing Condition on the Peel Strength of Screen-printed Ag Film and Polyimide Substrate (후속 열처리조건이 스크린 프린팅 Ag 박막과 폴리이미드 사이의 필강도에 미치는 영향)

  • Bae, Byung-Hyun;Lee, Hyeonchul;Son, Kirak;Park, Young-Bae
    • Journal of the Microelectronics and Packaging Society
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    • v.24 no.2
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    • pp.69-74
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    • 2017
  • Effect of post-annealing treatment times at $200^{\circ}C$ on the peel strength of screen-printed Ag film/polyimide substrate were systematically investigated by $180^{\circ}$ peel test for thermal reliability assessment of printed interconnect. Initial peel strength around 16.7 gf/mm increased up to 29.4 gf/mm after annealing for 24hours, and then sharply decreased to 22.3, 3.6, 0.6, and 0.1 gf/mm after 48, 100, 250, and 500 hours, respectively. Ag-O-C chemical bonding as well as binder organic bridges formations seemed to be responsible for interfacial adhesion improvement after the initial annealing treatment, while excessive Cu oxide formation at Cu/Ag interface seems to be closely related to sharp decrease in peel strength for longer annealing times.

Design of a Parallel Multiplier for Irreducible Polynomials with All Non-zero Coefficients over GF($p^m$) (GF($p^m$)상에서 모든 항의 계수가 0이 아닌 기약다항식에 대한 병렬 승산기의 설계)

  • Park, Seung-Yong;Hwang, Jong-Hak;Kim, Heung-Soo
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.39 no.4
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    • pp.36-42
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    • 2002
  • In this paper, we proposed a multiplicative algorithm for two polynomials with all non-zero coefficients over finite field GF($P^m$). Using the proposed multiplicative algorithm, we constructed the multiplier of modular architecture with parallel in-output. The proposed multiplier is composed of $(m+1)^2$ identical cells, each cell consists of one mod(p) additional gate and one mod(p) multiplicative gate. Proposed multiplier need one mod(p) multiplicative gate delay time and m mod(p) additional gate delay time not clock. Also, our architecture is regular and possesses the property of modularity, therefore well-suited for VLSI implementation.