• E2M - 전기 전자와 첨단 소재
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• 제7권5호
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• pp.376-382
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• 1994

In this study we developed a program(DEVSIM) to simulate the two dimensional distribution of the electrostatic potential and the electric field of the arbitrary structure consisting of GaAs/AlGaAs semiconductor and metal as well as dielectric. By the comparision of the electric field distribution of GaAs MESFETs with the various recess gates we proposed a suitable device structure to improve the breakdown characteristics of MESFET. According to the results of simulation the breakdown characteristics were improved as the thickness of the active epitaxial layer was decreased. And the planar structure, which had the highly doped layer under the drain for the ohmic contact, was the worst because the highly doped layer prevented the space charge layer below the gate from extending to the drain, which produced the narrow spaced distribution of the electrostatic potential contours resulting in the high electric field near the drain end. Instead of the planar structure with the highly doped drain the recess gate structure having the highly doped epitaxial drain layer show the better breakdown characteristics by allowing the extention of the space charge layer to the drain. Especially, the structure in which the part of the drain epitaxial layer near the gate show the more improvement of the breakdown characteristics.

• 한국정보통신학회논문지
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• 제12권3호
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• pp.541-546
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• 2008

본 연구에서는 분석학적 모델을 이용하여 나노구조 이중게이트 MOSFET의 전도현상을 고찰하고자 한다. 분석학적 모델을 유도하기 위하여 포아슨방정식을 이용하였다. 전류전도에 영향을 미치는 전도메카니즘은 열방사전류와 터널링전류를 사용하였으며 본 연구의 모델이 타당하다는 것을 입증하기 위하여 서브문턱스윙값에 대하여 이차원 시뮬레이션 값과 비교하였다. 이중게이트 MOSFET의 구조적 파라미터인 게이트길이, 게이트 산화막 두께, 채널두께에 따라 전도중심의 변화와 전도중심이 서브문턱스윙에 미치는 영향을 고찰하였다. 또한 채널 도핑농도에 따른 전도중심의 변화를 고찰함으로써 이중게이트 MOSFET의 타당한 채널도핑농도를 결정하였다.

• 한국전기전자재료학회논문지
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• 제32권2호
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• pp.104-109
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• 2019

An analytical threshold voltage model is proposed to analyze the threshold voltage roll-off and drain-induced barrier lowering (DIBL) for a junction-based double-gate (JBDG) MOSFET and a junction-less double-gate (JLDG) MOSFET. We used the series-type potential distribution function derived from the Poisson equation, and observed that it is sufficient to use n=1 due to the drastic decrease in eigenvalues when increasing the n of the series-type potential function. The threshold voltage derived from this threshold voltage model was in good agreement with the result of TCAD simulation. The threshold voltage roll-off of the JBDG MOSFET was about 57% better than that of the JLDG MOSFET for a channel length of 25 nm, channel thickness of 10 nm, and oxide thickness of 2 nm. The DIBL of the JBDG MOSFET was about 12% better than that of the JLDG MOSFET, at a gate metal work-function of 5 eV. It was also found that decreasing the work-function of the gate metal significantly reduces the DIBL.

• 한국방사선학회논문지
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• 제13권1호
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• pp.81-86
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• 2019

X-선 영상에서 필터를 통한 여과의 역할은 영상 형성에 유용한 광자를 이용해 환자의 피폭량을 낮춤과 동시에 영상의 대조도를 높이는 것이다. 영상을 형성하는 데 있어서 저에너지 X-선은 환자 조직의 최초 몇 cm 부위에서 흡수되고 고에너지 부분만을 통과하여 형성되므로, 방사선 여과는 여과물질을 삽입하여 저에너지 X-선을 여과물질로 하여금 흡수시켜 환자의 피폭량을 낮추고 영상의 질을 높인다. 본 연구의 목적은 시뮬레이션을 통해 이상적인 환경에서 부가 필터가 방사선 영상 촬영 시 영상의 화질에 미치는 영향을 확인하고, 실제 방사선 영상을 촬영할 경우와 비교하는 것이다. 이를 위해 시뮬레이션 프로그램인 Geant4 Application for Tomographic Emission (GATE)를 이용해 Polymethylmethacrylate (PMMA) Phantom의 실제 크기, 모양과 재질을 모사하고 부가 필터의 사용유무 및 필터의 두께에 따른 촬영 조건을 설정하여 시뮬레이션 결과 영상을 얻어냈다. 또한, Digital Radiography (DR)장비로 실제 PMMA Phantom을 필터가 없는 경우와 필터가 있을 때 그 두께를 변화시키며 촬영했다. 시뮬레이션의 결과 영상과 실제 실험을 통해 얻은 영상을 각각 Image J 프로그램을 이용해 Contrast-to-noise ratio (CNR) 평가를 실행한 뒤, 시뮬레이션 결과 영상과 최종적으로 도출된 두 영상의 변화 추이를 비교 측정했다. 실험 결과 DR장비와 시뮬레이션 영상 모두 CNR이 감소하는 추세를 보였으며, 이는 결국 영상에서의 대조도 감소로 인해 나타난 결과였다. 이론적으로 관전압 (kVp)이 증가하면 대조도가 감소하고, 이를 통해보았을 때 필터는 저에너지부의 X-선을 흡수하면서 전체적인 선량을 감소시키지만, X-선의 평균에너지를 증가시키는 역할을 한다는 것을 알아볼 수 있었다.

• ETRI Journal
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• 제31권5호
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• pp.604-606
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• 2009

The primary dose effects on an insulated gate bipolar transistor (IGBT) irradiated with a $^{60}Co$ gamma-ray source are found in both of the components of the threshold shifting due to oxide charge trapping in the MOS and the reduction of current gain in the bipolar transistor. In this letter, the IGBT macro-model incorporating irradiation is implemented, and the electrical characteristics are analyzed by SPICE simulation and experiments. In addition, the collector current characteristics as a function of gate emitter voltage, VGE, are compared with the model considering the radiation damage of different doses under positive biases.

• JSTS:Journal of Semiconductor Technology and Science
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• 제17권2호
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• pp.271-276
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• 2017

The triple-gate tunnel FETs encapsulated with an epitaxial layer (EL TFETs) is proposed to lower the subthreshold swing of the TFETs. Furthermore, the band-to-band tunneling based on the maximum electric-field can occur thanks to the epitaxial layer wrapping the Si fin. The performance and mechanism of the EL TFETs are compared with the previously proposed TFET based on simulation.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2011년도 추계학술대회
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• pp.3-4
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• 2011

This paper presents a survey of floating power supply based on bootstrap operation for three-level voltage-source inverters. The floating power supply for upper switches is achieved by the bootstrap capacitor charged during on-time of the switch underneath. Hence, a large number of bulky isolated DC/DC power supplies for each gate driver are reduced. The Pspice simulation results show the behavior of bootstrap devices and the performance of bootstrap capacitor voltage.

• Journal of Electrical Engineering and Technology
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• 제4권3호
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• pp.401-404
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• 2009

A simple analytical expression for a current gain of IGBT is derived in terms of the device parameters as well as a gate length dependent parameter, which allows for the determination of the current components of the device as a function of its gate length. The analytical results are compared with those from simulation results. A good agreement is found.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2001년도 Proceedings ICPE 01 2001 International Conference on Power Electronics
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• pp.713-717
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• 2001

This paper focuses on a network model for GCTs which can be used to investigate high power circuits with or without using RC-snubbers. The series connection of GCTs is commonly applied in the high power inverter field. Here expensive and space-consuming snubbers are applied, to overcome the problem of an asymmetric distribution of the blocking voltage among the single GCTs. As an alternative to large snubbers, a new active gate drive concept is proposed and investigated by simulation.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2004년도 전력전자학술대회 논문집(2)
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• pp.791-794
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• 2004

This paper made an induction heating inverter. The inverter is the $20\~40[kHz]$ a resonant inverter which uses a high frequency. We use this inverter and use induction heating. A phasor shift ordered a gate signal to adjust an inverter's output. We verified an output waveform according to the situation of a gate signal through the simulation. We made the inverter really and got the result.