• Journal of IKEEE
• /
• v.27 no.3
• /
• pp.308-312
• /
• 2023

The gate current sensing structure was proposed to more effectively control the regulation of the output voltage when the LDO regulator occurs in an overshoot or undershoot situation. In a typical existing LDO regulator, the regulation voltage changes when the load current changes. However, the operation speed of the pass transistor can be further improved by supplying/discharging the gate terminal current in the pass transistor using a gate current sensing structure. The input voltage of the LDO regulator using the gate current sensing structure is 3.3 V to 4.5 V, the output voltage is 3 V, and the load current has a maximum value of 250 mA. As a result of the simulation, a voltage change value of about 12 mV was confirmed when the load current changed up to 250 mA.

• Proceedings of the Korean Society for Technology of Plasticity Conference
• /
• 2003.04a
• /
• pp.33-39
• /
• 2003

Injection molding is widely used in producing various plastic parts due to its high productivity and the demand for high precision injection molded products is ever increasing. To achieve successful product quality and precision, the design of gating and runner systems in the injection mold is very important since it directly influences melt flow into the cavity. Some defects such as weld lines and overpacking can be effectively controlled with proper selection of gate locations. In the present study, the design of gate locations in injection molding of a dashboard for automobiles was carried out with CAMPmold, a PC-based simulation system for injection molding. A dummy runner was developed to simulate a runner system in order to increase the efficiency of the analysis. The numbers and locations of gates were varied in the present investigation as that an acceptable design was obtained in terms of reduced maximum pressure and clamping force.

• Transactions on Electrical and Electronic Materials
• /
• v.14 no.6
• /
• pp.291-294
• /
• 2013

When subjected to a change in dimensions, the device performance decreases. Multi-gate SOI devices, viz. the Double Gate MOSFET (DG-MOSFET), are expected to make inroads into integrated circuit applications previously dominated exclusively by planar MOSFETs. The primary focus of attention is how channel engineering (i.e. Graded Channel (GC)) and gate engineering (i.e. Dual Insulator (DI)) as gate oxide) creates an effect on the device performance, specifically, leakage current ($I_{off}$), on current ($I_{on}$), and DIBL. This study examines the performance of the devices, by virtue of a simulation analysis, in conjunction with N-channel DG-MOSFETs. The important parameters for improvement in circuit speed and power consumption are discussed. From the analysis, DG-DI MOSFET is the most suitable candidate for high speed switching application, simultaneously providing better performance as an amplifier.

• Proceedings of the Korean Society of Agricultural Engineers Conference
• /
• 2002.10a
• /
• pp.133-136
• /
• 2002

A simulation by the TOPAS model, two dimensional finite difference model was performed on the flows through drainage lock gate for the Saemangeum tidal reclamation project. Analysis focus on the changes of intertidal zone areas according to the operation scheme of the gate. The intertidal zone areas were analyzed as $66{\sim}70\;km^2$ when the opening of the gate was 300 m. It occupied about $85{\sim}90%$ of intertidal zone areas compared to that the Mangyung sea basin was opened without sea-dike. It appeared to be the most effective in terms of securing enough intertidal zone areas when the gate was operated as inflowing sea-water after 2 day's drainage.

• Transactions of The Korea Fluid Power Systems Society
• /
• v.7 no.2
• /
• pp.19-26
• /
• 2010

The typical trunk lid system for vehicle is composed of a hinge having 4-bar link and gas lifter. Here, the energy regenerative brake of hydraulic driven systems is applied to the tail gate system for vehicle and removed the gas lifter. The new tail gate system is composed of a hydraulic pump by electric motor, a hydraulic motor, four check valves, an accumulator, a relief valve and a directional control valve. The dynamic characteristics of the hydraulic motor system, such as the surge pressure and response time, are investigated in both brake action and acceleration action. The capacity selection method of accumulator by mathematical model is based upon trial and error approach and computer simulation by AMEsim software is carried out.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.17 no.8
• /
• pp.799-805
• /
• 2004

Two dimensional MEDICI simulator is used to study the characteristics of latch-up current of Dual Gate Emitter Switched Thyristor. The simulation is done in terms of the current-voltage characteristics, latch-up current density, ON-voltage drop and electrical property with the variations of p-base impurity concentrations. Compared with the other power devices such as MOS Controlled Cascade Thyristor(MCCT), Conventional Emitter Switched Thyristor(C-EST) and Dual Channel Emitter Switched Thyristor(DC-EST), Dual Gate Emitter Switched Thyristor(DG-EST) shows to have the better electrical characteristics, which is the high latch-up current density and low forward voltage-drop. The proposed DG-EST which has a non-planer p-base structure under the floating $N^+$ emitter indicates to have the better characteristics of latch-up current and breakover voltage.

• Proceedings of the KIEE Conference
• /
• 2001.07c
• /
• pp.1451-1453
• /
• 2001

An SOI(Silicon-On-Insulator) LD(Lateral Double-diffused)MOS with graded gate and recessed source is proposed. The proposed structure can increase the breakdown voltage by reducing the electric field crowding at the edge of gate. Simulation results by TSUPREM4 and MEDICI have shown that the breakdown voltage of proposed device was found to be 52 V while that of conventional device was 45 V. At the same breakdown voltage of 45 V, the on-resistance of the LDMOS with graded gate and recessed source was 14.4 % lower than that of conventional structure.

• Journal of the Korean Society of Manufacturing Process Engineers
• /
• v.6 no.1
• /
• pp.71-77
• /
• 2007

In case of the welding process, a conventional production method of gate valve, it has a merit of light weight, but also a demerit of high production cost and an impossibility in mass production due to work by hand. However, in case of the forging process, it has economic merits and can take a mass production process, too. The main focus of this paper is the optimization of preform in the forging process. This paper proposed an optimal design to improve the mechanical efficiency of gate valve made by forging method instead of welding. the optional design is conducted as application of real response model to Kriging model using computer simulation. Also, from verification of the response model with optimized results we were confirmed that the applications of Kriging method to structural optimum design using finite element analysis and equation are useful and reliable.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.25 no.4
• /
• pp.266-269
• /
• 2012

The most recently IGBT (insulated gate bipolar mode transistor) devices are in the most current conduction capable devices and designed to the big switching power device. Use this number of the devices are need to high voltage and low on-state voltage drop. And then in this paper design of field stop IGBT is insert N buffer layer structure in NPT planar IGBT and optimization design of field stop IGBT and trench field stop IGBT, both devices have a comparative analysis and reflection of the electrical characteristics. As a simulation result, trench field stop IGBT is electrical characteristics better than field stop IGBT.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2003.07a
• /
• pp.312-315
• /
• 2003

Basic design of RC-GCTs (Reserve-Conducting Gate-Commutated Thyristors) by novel punch-through (PT) concept with 5,500v rated voltage is described here. A PT and NPT (non punch-through) concept for the same blocking voltage has been compared in detail. The simulation work indicates that GCT with such PT design exhibits that the forward breakdown voltage is 6,400V which is enough for supporting 5500V blocking. Additionally, the real IGCT turn-off in the mode of PNP transistor has been realized. However, the carrier extraction from N-base to gate terminal will be drastic slowly in terms of NPT structure except for the high on-state voltage drop.