• Proceedings of the KIEE Conference
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• 1997.07e
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• pp.1712-1714
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• 1997

This paper deals with the surge counter drived by lightning and switching currents. In order to install the effective surge protective devices, it is important to find the parameters of incident surges. In this paper, for the purpose of protecting the electronic circuits and counting the occuring frequency, the current driving type surge counter is designed and fabricated. The surge counter consists of surge protective divices, current detector, metal oxide varistor(MOV), rectifier, capacitor, and electromagnetic counter. This surge counter is able to count the occuring frequency of surges and to clamp lightning surge current. To evaluate the performance of the surge counter, impulse voltage and current were applied at the surge counter by the surge generator. As a result, applied surges were exactly counted and clamped.

• Journal of Institute of Convergence Technology
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• v.5 no.1
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• pp.37-40
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• 2015

Numerical analyses on the aerodynamic characteristics of a counter rotating axial flow fan is carried out using the frequency domain panel method. Front rotor and rear rotor blades of a counter rotating axial fan are designed by using the simplified meridional flow analysis method with the radial equilibrium equation and the free vortex design condition, according to design requirements. Performance characteristics of a counter rotating axial flow fan are estimated for the variation of design parameters such as the hub to tip ratio, the taper ratio and the solidity. Pressure losses were higher at leading edge and hub region of rotor blades. Characteristic curve of the counter rotating fan was overpredicted without consideration of viscous effect.

• Proceedings of the Korea Institute of Applied Superconductivity and Cryogenics Conference
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• 2003.10a
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• pp.127-130
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• 2003

An RSFQ (Rapid Single Flux Quantum) counter can be used as a frequency divider that was an essential part of a programmable voltage standard chip. The voltage standard chip is composed of two circuit parts, a counter and an antenna Analog signal of tens to hundreds ㎓ may be applied to a finline antenna part. This analog signal can be converted to the stream of SFQ voltage pulses by a DC/SFQ circuit. The number of voltage pulses can be reduced by 2n times when they pass through a counter that is composed of n T Flip-Flops (Toggle Flip-Flop). Such a counter can be used not only as a frequency divider, but also to build a programmable voltage standard chip. So, its application range can be telecommunication, high speed RAM, microprocessor, etc. In this work, we have used Xic, WRspice, and L-meter to design an RSFQ counter. After circuit optimization, we could obtain the bias current margins of the T Flip-Flop circuit to be above 31％ Our RSFQ counter circuit designs were based on the 1 ㎄/$\textrm{cm}^2$ niobium trilayer technology.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.26 no.11
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• pp.999-1011
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• 2015

In modern electronic warfare, RADAR is under constant threat of ECM(Electronic Counter Measures) signals from nearby jammers. The conventional linear frequency modulated(Linear-FM) waveform is easy to be intercepted to estimate its signal parameters due to its periodical phase transition. Recently, APCN(Advanced Pulse Compression Noise) waveform using random amplitude and phase transition was proposed for LPI(Low probability of Intercept). But random phase code signals such as APCN waveform tend to be sensitive to Doppler frequency shift and result in performance degradation during moving target detection. In this paper, random phase and code rate transition based radar waveform(RPCR) is proposed for Doppler tolerance improvement. Time frequency analysis is carried out through ambiguity analysis to validate the improved Doppler tolerance of RPCR waveform. As a means to measure the vulnerability of the proposed RPCR waveform against LPI, WHT(Wigner-Hough Transform) is adopted to analyze and estimate signal parameters for ECCM(Electronic Counter Counter Measures) application.

• Transactions of the Korean Society of Mechanical Engineers B
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• v.24 no.3
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• pp.325-337
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• 2000

A study was done on the numerical and experimental analyses of the aerodynamic characteristics of a counter rotating axial fan. The numerical analysis uses the frequency domain panel method developed for the aerodynamic analysis of interacting rotating systems, which is based on the unsteady lifting surface panel method. Each stage of interaction involves the solution of an isolated rotor, the interaction being done through the Fourier transform of the induced velocity field. Numerical results showed good agreements with other experimental data for single and counter rotating propeller systems. And they were compared with the experimental results of the counter rotating axial fan studied in the present paper. The performance test was carried out based on the Korean Standard (KS B 6311). It was focused on the relative efficiency increase of a counter rotating system for a single rotating one, and effects of the axial distance between the front and rear rotors on overall fan performances were investigated. As a result, it was shown that the counter rotating axial fan has the efficiency 14% higher than the single rotating one at peak efficiency points.

• Transactions of the Korean Society of Mechanical Engineers
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• v.18 no.6
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• pp.1590-1597
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• 1994

The aerodynamic analysis of a $6{\times}6$ counter-rotating propfan around a missile-like-body has been completed analytically using a frequency domain panel method. The present method requires Fourier transformation of flow field around the propfan in computing the velocities normal to the propfan lifting surfaces. The aerodynamic performance curve is determined by angle of attack and nonuniform inflow conditions. The inflow conditions result from the variations of missile flight speed, angle of attack, propfan location relative to control surfaces and control surface deflection angle. The two cases of propfan location relative to control surface, front and behind, are analyzed and the aerodynamic results are presented.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.24 no.7
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• pp.885-890
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• 2020

In the distance measurement system the time-to-digital conversion circuit used measures the distance using the time interval between the start signal and the stop signal. The time interval is generally converted to digital information using a counter circuit considering the response speed. Therefore, a clock signal with a high frequency is required to improve precision, and a clock signal with a high frequency is also required to measure fine distances. In this paper, a counter circuit was designed to increase the accuracy of distance measurement while using the same frequency. The circuit design was performed using a 0.18㎛ CMOS process technology, and the operation of the designed circuit was confirmed through HSPICE simulation. As a result of the simulation, it is possible to obtain an improvement of four times the precision compared to the case of using a general counter circuit.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2005.11a
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• pp.137-140
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• 2005

A frequency synthesizer of 10 GHz $\sim$ 11 GHz for FMCW radar is designed and implemented by the form of indirect frequency synthesizer of a single loop structure. The synthesizer uses a high speed digital PLL chip. It is difficult to divide directly by using a program counter of PLL chip because the output frequency of VCO is 10 GHz $\sim$ 11 GHz, so we lower the frequency to 625 MHz $\sim$ 687.5 MHz by using a prescaler, and then divide the frequency by the program counter. The output frequency sweep of VCO from 10 GHz to 11 GHz is measured.

• Proceedings of the Korean Society of Marine Engineers Conference
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• 2005.11a
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• pp.208-209
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• 2005

A frequency synthesizer of 10 GHz ${\sim}$ 11 GHz for FMCW radar is designed and implemented by the form of indirect frequency synthesizer of a single loop structure. The synthesizer uses a high speed digital PLL chip. It is difficult to divide directly by using a program counter of PLL chip because the output frequency of VCO is 10 GHz ${\sim}$ 11 GHz, so we lower the frequency to 625 MHz ${\sim}$ 687.5 MHz by using a prescaler, and then divide the frequency by the program counter. The output frequency sweep of VCO from 10 GHz to 11 GHz is measured.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.13 no.7
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• pp.1386-1392
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• 2009

In this paper, we have developed the test equipment to measure performance of oscillator using Double Side Edge Trigger(DSET). This DSET increases counting number of micro pulse by frequency counter, which will successfully reduce the half measuring time to comparison with the existing counter by using DSET. This new concept of performance measuring equipment provides a high productivity and performance improvement.