• Title/Summary/Keyword: Fowler-Nordheim

Search Result 94, Processing Time 0.029 seconds

An Reliable Non-Volatile Memory using Alloy Nano-Dots Layer with Extremely High Density

  • Lee, Gae-Hun;Kil, Gyu-Hyun;An, Ho-Joong;Song, Yun-Heup
    • Proceedings of the Korean Vacuum Society Conference
    • /
    • 2010.02a
    • /
    • pp.241-241
    • /
    • 2010
  • New non-volatile memory with high density and high work-function metal nano-dots, MND (Metal Nano-Dot) memory, was proposed and fundamental characteristics of MND capacitor were evaluated. In this work, nano-dot layer of FePt with high density and high work-function (~5.2eV) was fabricated as a charge storage site in non-volatile memory, and its electrical characteristics were evaluated for the possibility of non-volatile memory in view of cell operation by Fowler-Nordheim (FN)-tunneling. Here, nano-dot FePt layer was controlled as a uniform single layer with dot size of under ~ 2nm and dot density of ${\sim}\;1.2{\times}10^{13}/cm^2$. Electrical measurements of MOS structure with FePt nano-dot layer shows threshold voltage window of ~ 6V using FN programming and erasing, which is satisfied with operation of the non-volatile memory. Furthermore, this structure provides better data retention characteristics compared to other metal dot materials with the similar dot density in our experiments. From these results, it is expected that this non-volatile memory using FePt nano-dot layer with high dot density and high work-function can be one of candidate structures for the future non-volatile memory.

  • PDF

Cell Characteristics of a Multiple Alloy Nano-Dots Memory Structure

  • Kil, Gyu-Hyun;Lee, Gae-Hun;An, Ho-Joong;Song, Yun-Heup
    • Proceedings of the Korean Vacuum Society Conference
    • /
    • 2010.02a
    • /
    • pp.240-240
    • /
    • 2010
  • A multiple alloy metal nano-dots memory using FN tunneling was investigated in order to confirm its structural possibility for future flash memory. In this work, a multiple FePt nano-dots device with a high work function (~5.2 eV) and extremely high dot density (${\sim}\;1.2{\times}10^{13}/cm^2$) was fabricated. Its structural effect for multiple layers was evaluated and compared to one with a single layer in terms of the cell characteristics and reliability. We confirm that MOS capacitor structures with 2-4 multiple FePt nano-dot layers provide a larger threshold voltage window and better retention characteristics. Furthermore, it was also revealed that several process parameters for block oxide and inter-tunnel oxide between the nano-dot layers are very important to improve the efficiency of electron injection into multiple nano-dots. From these results, it is expected that a multiple FePt nano-dots memory using Fowler-Nordheim (FN)-tunneling could be a candidate structure for future flash memory.

  • PDF

Study on the Fabrication of Tunnel Type $E^2PROM$ and Its Characteristics (터널링형 $E^2PROM$ 제작 및 그 특성에 관한 연구)

  • Kim, Jong Dae;Kim, Sung Ihl;Kim, Bo Woo;Lee, Jin Hyo
    • Journal of the Korean Institute of Telematics and Electronics
    • /
    • v.23 no.1
    • /
    • pp.65-73
    • /
    • 1986
  • Experiment have been conducted about thin oxide characteristics according to O2/N2 ratio needed for EEPROM cell fabrication. As a result, we think that there is no problem even if we grow oxide layer with large O2/N2 ratio and short exidation time and when the water is implated by As before oxidation, the oxide breakdown field is about IMV/cm lower than that is not implanted. Especially, the thin oxide characteristic seems to be affected largely by wafer cleaning and oxidation in air. On the basis of these, tunnel type EEPROM cell is fabricated by 3um CMOS process and its characteristic is studied. Tunnel oxide thickness(100\ulcorner is chosen to allow Fowler-Nordheim tunneling to charge the floating gate at the desired programming voltage and tunnel area(2x2um\ulcorneris chosen to increase capacitive coupling ratio. For program operation, high voltage (20-22V) is applied to the control gate, while both drain and source are gdrounded. The drain voltage for erase is 16V. It is shown that charge retention characteristics is not limited by leakage in the oxide and program/erase endurance is over 10E4 cycles of program erase operation.

  • PDF

Efficiency and Lifetime Improvement of Organic Light- Emitting Diodes with a Use of Lithium-Carbonate- Incorportated Cathode Structure

  • Mok, Rang-Kyun;Kim, Tae-Wan
    • Transactions on Electrical and Electronic Materials
    • /
    • v.13 no.2
    • /
    • pp.60-63
    • /
    • 2012
  • Enhancement of efficiency and luminance of organic light-emitting diodes was investigated by the introduction of a lithium carbonate ($Li_2CO_3$) electron-injection layer. Electron-injection layer is used in organic light-emitting diodes to inject electrons efficiently between a cathode and an organic layer. A device structure of ITO/TPD (40 nm)/$Alq_3$ (60 nm)/$Li_2CO_3$ (x nm)/Al (100 nm) was manufactured by thermal evaporation, where the thickness of $Li_2CO_3$ layer was varied from 0 to 3.3 nm. Current density-luminance-voltage characteristics of the device were measured and analyzed. When the thickness of $Li_2CO_3$ layer is 0.7 nm, the current efficiency and luminance of the device at 8.0 V are improved by a factor of about 18 and 3,000 compared to the ones without the $Li_2CO_3$ layer, respectively. The enhancement of efficiency and luminance of the device with an insertion of $Li_2CO_3$ electron-injection layer is thought to be due to the lowering of an electron barrier height at the interface region between the cathode and the emissive layer. This is judged from an analysis of current density-voltage characteristics with a Fowler-Nordheim tunneling conduction mechanism model. In a study of lifetime of the device that depends on the thickness of $Li_2CO_3$ layer, the optimum thickness of $Li_2CO_3$ layer was obtained to be 1.1 nm. It is thought that an improvement in the lifetime is due to the prevention of moisture and oxygen by $Li_2CO_3$ layer. Thus, from the efficiency and lifetime of the device, we have obtained the optimum thickness of $Li_2CO_3$ layer to be about 1.0 nm.

Surface structure modification of vertically-aligned carbon nanotubes and their characterization of field emission property

  • adil, Hawsawi;Jeong, Gu-Hwan
    • Proceedings of the Korean Vacuum Society Conference
    • /
    • 2016.02a
    • /
    • pp.159-159
    • /
    • 2016
  • Vertically-aligned carbon nanotubes (VCNT) have attracted much attention due to their unique structural, mechanical and electronic properties, and possess many advantages for a wide range of multifunctional applications such as field emission displays, heat dissipation and potential energy conversion devices. Surface modification of the VCNT plays a fundamental role to meet specific demands for the applications and control their surface property. Recent studies have been focused on the improvement of the electron emission property and the structural modification of CNTs to enable the mass fabrication, since the VCNT considered as an ideal candidate for various field emission applications such as lamps and flat panel display devices, X-ray tubes, vacuum gauges, and microwave amplifiers. Here, we investigate the effect of surface morphology of the VCNT by water vapor exposure and coating materials on field emission property. VCNT with various height were prepared by thermal chemical vapor deposition: short-length around $200{\mu}m$, medium-length around $500{\mu}m$, and long-length around 1 mm. The surface morphology is modified by water vapor exposure by adjusting exposure time and temperature with ranges from 2 to 10 min and from 60 to 120oC, respectively. Thin films of SiO2 and W are coated on the structure-modified VCNT to confirm the effect of coated materials on field emission properties. As a result, the surface morphology of VCNT dramatically changes with increasing temperature and exposure time. Especially, the shorter VCNT change their surface morphology most rapidly. The difference of field emission property depending on the coating materials is discussed from the point of work function and field concentration factor based on Fowler-Nordheim tunneling.

  • PDF

Structural and electrical characterizations of $HfO_{2}/HfSi_{x}O_{y}$ as alternative gate dielectrics in MOS devices (MOS 소자의 대체 게이트 산화막으로써 $HfO_{2}/HfSi_{x}O_{y}$ 의 구조 및 전기적 특성 분석)

  • 강혁수;노용한
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 2001.07a
    • /
    • pp.45-49
    • /
    • 2001
  • We have investigated physical and electrical properties of the Hf $O_2$/HfS $i_{x}$/ $O_{y}$ thin film for alternative gate dielectrics in the metal-oxide-semiconductor device. The oxidation of Hf deposited directly on the Si substrate results in the H $f_{x}$/ $O_{y}$ interfacial layer and the high-k Hf $O_2$film simultaneously. Interestingly, the post-oxidation N2 annealing of the H102/H1Si70y thin films reduces(increases) the thickness of an amorphous HfS $i_{x}$/ $O_{y}$ layer(Hf $O_2$ layer). This phenomenon causes the increase of the effective dielectric constant, while maintaining the excellent interfacial properties. The hysteresis window in C-V curves and the midgap interface state density( $D_{itm}$) of Hf $O_2$/HfS $i_{x}$/ $O_{y}$ thin films less than 10 mV and ~3$\times$10$^{11}$ c $m^{-2}$ -eV without post-metallization annealing, respectively. The leakage current was also low (1$\times$10-s A/c $m^2$ at $V_{g}$ = +2 V). It is believed that these excellent results were obtained due to existence of the amorphous HfS $i_{x}$/ $O_{y}$ buffer layer. We also investigated the charge trapping characteristics using Fowler-Nordheim electron injection: We found that the degradation of Hf $O_2$/HfS $i_{x}$/ $O_{y}$ gate oxides is more severe when electrons were injected from the gate electrode.e electrode.e.e electrode.e.

  • PDF

코어-쉘 양자점을 포함한 poly(N-vinylcarbazole)층을 사용하여 제작한 비휘발성 메모리 소자의 전하 수송 메카니즘과 안정성

  • Son, Jeong-Min;Yun, Dong-Yeol;Kim, Tae-Hwan;Kim, Seong-U;Kim, Sang-Uk
    • Proceedings of the Korean Vacuum Society Conference
    • /
    • 2012.02a
    • /
    • pp.368-368
    • /
    • 2012
  • 무기물 나노입자를 포함하는 유기물/무기물 나노복합체는 플렉시블 전자 소자에 적용이 가능하기 때문에 차세대 비휘발성 메모리 소자에 대한 응용연구가 활발히 진행되고 있다. 본 논문에서는 $CuInS_2$ (CIS)/ZnS 코어-쉘 나노 입자를 포함한 poly(N-vinylcarbazole) (PVK) 고분자 박막을 기억 매체로 사용하는 유기 쌍안정성 소자(organic bistable devices, OBD) 메모리 소자를 제작하고 전기적 성질에 대하여 관찰하고 전하 수송 메카니즘에 대하여 규명하였다. 화학적 방법으로 형성한 CIS/ZnS 코어-쉘 나노 입자와 PVK를 toluene 용매에 녹인 후 초음파 교반기를 사용하여 나노 복합 소재를 형성하였다. 하부 전극으로 indium-tin-oxide (ITO)가 증착되어 있는 유리 기판 위에 나노 복합 소재를 스핀코팅 방법으로 도포한 후 열을 가해 잔류 용매를 제거하였다. CIS/ZnS 코어-쉘 나노 입자가 분산되어 있는 PVK 나노 복합 소재로 구성된 박막위에 상부 전극으로 Al을 열증착하여 메모리 소자를 제작하였다. 전류-전압 (I-V) 측정 결과에서 저전압에서는 전도도가 낮은 OFF 상태를 유지하다 어느 특정 양의 전압에서 전도도가 갑자기 증가하여 높은 전도도의 ON 상태로 전이되는 쌍안정성이 관찰되었다. 전류의 ON/OFF 비율은 약 $10^3$이며 역방향 바이어스를 가해주었을 때 특정 음의 전압에서 전도도가 ON 상태에서 OFF 상태로 전환되는 전형적인 OBD 메모리 소자의 I-V 특성을 나타났다. 메모리 전하 수송 메커니즘 분석 결과 쓰기 과정은 thermionic emission (TE), space-charge-limited-current (SCLS) 모델과 지우기 과정은 Fowler-Nordheim (FN) 터널링 모델로 설명이 되었다. 제작된 소자에 대해 기억 시간 측정 결과는 ON과 OFF 상태의 전류가 장시간에도 변화가 거의 없는 소자의 안정성을 보여주었다. 이 실험 결과는 CIS/ZnS 코어-쉘 나노 입자가 분산되어 있는 PVK 나노 복합 소재를 사용하여 안정성을 가진 OBD 메모리 소자를 제작할 수 있음을 보여주고 있다.

  • PDF

Well aligned carbon nanotubes grown on a large area Si substrate by thermal CVD

  • Lee, Cheol-Jin;Park, Jung-Hoon;Son, Kwon-Hee;Kim, Dae-Woon;Lee, Tae-Jae;Lyu, Seung-Chul;Kang, Seung-Youl;Lee, Jin-Ho;Park, Hyun-Ki;Lee, Chan-Jae;You, Jong-Hun
    • 한국정보디스플레이학회:학술대회논문집
    • /
    • 2000.01a
    • /
    • pp.57-58
    • /
    • 2000
  • we have grown vertically aligned carbon nanotubes on a large area of Co-Ni codeposited Si substrates by thermal chemical vapor deposition using $C_2H_2$ gas. The carbon nanotubes grown by the thermal chemical vapor deposition are multi-wall structure, and the wall suface of nanotubes is covered with defective carbons or carbonaceous particles. The carbon nanotubes range from 50 to 120 nm in diameter and about 130 ${\mu}m$ in length at $950\;^{\circ}C$. Steric hindrance between nanotubes at an initial stage of the growth forces nanotubes to align vertically. The turn-on voltage was about 0.8 $V/{\mu}m$ with a current density of 0.1 ${\mu}A/cm^2$ and emission current reveals the Fowler-Nordheim mode.

  • PDF

Charge Trap Flash 메모리 소자 프로그램 동작 시 전하수송 메커니즘

  • Yu, Ju-Tae;Kim, Dong-Hun;Kim, Tae-Hwan
    • Proceedings of the Korean Vacuum Society Conference
    • /
    • 2011.08a
    • /
    • pp.273-273
    • /
    • 2011
  • 현재 사용되고 있는 플로팅 게이트를 이용한 플래시 메모리 소자는 비례축소에 의해 발생하는 단 채널 효과, 펀치스루 효과 및 소자간 커플링 현상과 같은 문제로 소자의 크기를 줄이는데 한계가 있다. 이러한 문제를 해결하기 위하여 silicon nitride와 같은 절연체를 전자의 트랩층으로 사용하는 charge trap flash (CTF) 메모리 소자에 대한 연구가 활발히 진행되고 있다. CTF 메모리 소자의 전기적 특성에 대한 연구는 활발히 진행 되었지만, 수치 해석 모델을 사용하여 메모리 소자의 전하수송 메커니즘을 분석한 연구는 매우 적다. 본 연구에서는 수치 해석 모델을 적용하여 개발한 시뮬레이터를 사용하여 CTF 메모리 소자의 프로그램 동작 시 전하수송 메커니즘에 대한 연구를 하였다. 시뮬레이터에 사용된 모델은 연속방정식, 포아송 방정식과 Shockley-Read-Hall 재결합 모델을 수치해석적 방법으로 계산하였다. 또한 CTF 소자 프로그램 동작 시 트랩 층으로 주입되는 전자의 양은 Wentzel-Kramers-Brillouin 근사 법을 이용하여 계산하였다. 트랩 층에 트랩 되었던 전자의 방출 모델은 이온화 과정을 사용하였다. 게이트와 트랩 층 사이의 터널링은 Fowler-Nordheim (FN) tunneling 모델, Direct tunneling 모델, Modified FN tunneling 모델을 적용하였다. FN tunneling 만을 적용했을때 보다 세가지 모델을 적용했을 때가 더 실험치와의 오차가 적었다. 그 이유는 시뮬레이션 결과를 통해 인가된 전계에 의해 Bottom Oxide 층의 에너지 밴드 구조가 변화하여 세가지 tunneling 모델의 구역이 발생하는 것을 확인 할 수 있었다. 계산된 결과의 전류-전압 곡선을 통해 CTF 메모리 소자의 프로그램 동작 특성을 관찰하였다. 트랩 층의 전도대역과 트랩 층 내부에 분포하는 전자의 양을 시간에 따라 계산하여 트랩 밀도가 시간이 지남에 따라 일정 값에 수렴하고 많은 전하가 트랩 될 수록 전하 주입이 줄어듬을 관찰 하였다. 이와 같은 시뮬레이션 결과를 통해 CTF 메모리의 트랩층에서 전하의 이동에 대해 더 많이 이해하여 CTF 소자가 가진 문제점 해결에 도움을 줄 것이다.

  • PDF

Evaluation of Discharge Current Employing Generalized Energy Method and Integral Ohm's Law Using Finite Element Method (유한요소법을 이용한 일반화된 에너지법과 옴의 적분법에 의한 방전 전류 계산)

  • Lee, Ho-Young;Kim, Hong-Joon;Lee, Se-Hee
    • The Transactions of The Korean Institute of Electrical Engineers
    • /
    • v.60 no.2
    • /
    • pp.357-361
    • /
    • 2011
  • The terminal current in voltage driven systems is an essential role for characterizing the pattern of electric discharge such as corona, breakdown, etc. Until now, to evaluate this terminal current, Sato's equation has been widely used in areas of high voltage and plasma discharge. Basically Sato's equation was derived by using the energy balance equation and its final form described physical meaning explicitly. To give more general abilities in Sato's equation, we present a generalized approach by directly using the Poynting's theorem incorporating the finite element method. When the magnetic field effect or the time-dependent voltage source is considered, this generalized energy method can be easily applicable to those problems with any dielectric media such as gas, fluid, and solid. As an alternative approach, the integral Ohm's law resulting in small numerical errors has an ability to be applied to multi-port systems. To test the generalized energy method and integral Ohm's law, first, the results from two prosed methods were compared to those from Sato's approach and an analytic solution in parallel plane electrodes. After verification, the generalized method was applied to the tip-sphere electrodes for evaluating the terminal current with three carriers and the Fowler-Nordheim field emission condition. From these results, we concluded that the generalized energy method can be a consistent technique for evaluating the discharge current with various dielectric materials or large magnetic field.