• The Journal of Korean Institute of Communications and Information Sciences
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• v.8 no.1
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• pp.38-42
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• 1983

The characteristic of a Tunnel Diode(TD) is approximated by the summation of two exponential terms, obtained from the haracteristic curves displayed on the curve tracer. Using this result, static characteristic of a TD pair was plotted by a computer programming. From these static characteristic curves, the triggering behavior of TC pair multi-vibrators was described graphically. Two stable characteristics were analyzed by piecewise linear Method. Theoritical switching Theoritical switching times of a TD pair flip-flop(F-F) circuits were compared with experimental results.

• Proceedings of the KIPE Conference
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• 2010.07a
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• pp.222-223
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• 2010

TOP245P driver IC modeling technique are proposed for the LED Driver design. Analog behavioral model of TOP245P IC including the shunt regulator, under-voltage(UV) detection, over-voltage(OV) shut-down and SR flip-flop is developed by using PSPICE. The averaged-model and switching-model is applied to the LED driver simulation. The simulation results by the proposed TOP245P IC modeling technique are in good agreement with that in the data sheet and an experiment data.

• Communications of the Korean Institute of Information Scientists and Engineers
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• v.5 no.2
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• pp.94-98
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• 1987

Multi-Valued(MV) sequential logic circuits are proposed which are free from HAZARD. In this paper, HAZARD is classified Function and Logic HAZARD, and MV switching function in which they are eliminated is described. Also, the basic MV memory elements which can be realized without HAZARD are presented, so that suggest the realizability in the large-scale MV logic system based on these elements.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.659-660
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• 2006

The low crosstalk row-decoder is studied for PoRAM applications. Because polymer-based memories can be more densely integrated than established silicon-based ones, PoRAM is highly sensitive for the crosstalk problem. To overcome the problem and to suggest the suitable decoder for PoRAM, this paper shows the comparison of the row-path characteristics for both the 2-stage dynamic logic decoder and the 2-stage static logic decoder. Moreover, to suppress the Glitch effect which is observed by using the static logic decoder, the Master-Slave(M/S) D-Flip/Flop(D-F/F) is applied as a deglitch. Finally, the improved output result of the 2-stage static logic decoder with the M/S D-F/F is shown..

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.3
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• pp.380-386
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• 2016

This paper presents a compact and low-power on-chip touch sensor and readout circuit using shunt proximity touch sensor and its design scheme. In the proposed touch sensor readout circuit, the touch panel condition depending on the proximity of the finger is directly converted into the corresponding voltage level without additional signal conditioning procedures. Furthermore, the additional circuitry including the comparator and the flip-flop does not consume any static current, which leads to a low-power design scheme. A new prototype touch sensor readout integrated circuit was fabricated using complementally metal oxide silicon (CMOS) $0.18{\mu}m$ technology with core area of $0.032mm^2$ and total current of $125{\mu}A$. Our measurement result shows that an actual 10.4 inches capacitive type touch screen panel (TSP) can detect the finger size from 0 to 1.52 mm, sharply.

• JSTS:Journal of Semiconductor Technology and Science
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• v.11 no.4
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• pp.302-308
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• 2011

In this paper, we have proposed a new approach for optical failure analysis which employs a CMOS photon-emitting circuitry, consisting of a flip-flop based on a sense amplifier and a photon-emitting device. This method can be used even with deep-submicron processes where conventional optical failure analyses are difficult to use due to the low sensitivity in the near infrared (NIR) region of the spectrum. The effectiveness of our approach has been proved by the failure analysis of a prototype designed and fabricated in 0.18 ${\mu}m$ CMOS process.

• Journal of information and communication convergence engineering
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• v.9 no.1
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• pp.74-77
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• 2011

PSPICE modeling of a commercial LED driver IC (TOP245P) and PC817A optocoupler is proposed for the switch-mode power supply (SMPS) (applicable to LED driver) design and simulation. An analog behavioral model of the TOP245P IC including the shunt regulator, under-voltage(UV) detection, over-voltage(OV) shut-down and SR flip-flop is developed by using PSPICE. The empirical equation of PC817A current transfer ratio (CTR) is fitted from the datasheet of PC817A. Two types of SMPSs are simulated with the averaged-model and switching-model. The simulation results by the proposed PSPICE models are in good agreement with those in the data sheet and an experimental data.

• Journal of the Korean Institute of Navigation
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• v.16 no.4
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• pp.35-45
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• 1992

In this study, an interface is developed in compliance with the standards which is made by National M.E.A in U.S.A for transmitting the Marine Gyrocompass information. The interface consists of Bearing Signal Transfer, Bearing Signal Demodulator, Bearing Signal Discriminator, Bearing Counter and, Informatioin Tranmitter. The results are as follows : The transmission of bearing information was achieved successfully on the Marine RADAR by the interface tranmitting for the Marine Gyrocompass. And, newly proposed phase-detector in Bearing Signal Discriminator which method is forcibly reset the previous data of D-T Flip Flop can be solved the problems of the delay in phase discrimination and the unstableness in the boundary areas of input signal.

• Proceedings of the Korea Institute of Applied Superconductivity and Cryogenics Conference
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• 2003.10a
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• pp.123-126
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• 2003

RSFQ (Rapid Single Flux Quantum) circuits are used in many practical applications. RSFQ DFFC (Delay Flip-Flop with complementary outputs) circuits can be used in a RAM, an ALU (Arithmetic Logic Unit), a microprocessor, and many communication devices. A DFFC circuit has one input, one switch input, and two outputs (output l and output 2). DFFC circuit functions in such way that output 1 follows the input and output 2 is the complement of the input when the switch input is "0." However, when there is a switch input "1."the opposite output signals are generated. In this work, we have designed an RSFQ DFFC circuit based on 1 ㎄/$\textrm{cm}^2$ niobium trilayer technology. As circuit design tools, we used Xic, WRspice, and Lmeter After circuit optimization, we could obtain the bias current margins of the DFFC circuit to be above 32％.

• Proceedings of the KIEE Conference
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• 2003.11c
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• pp.890-893
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• 2003

In this paper, we have designed the fractional-N frequency synthesizer for bluetooth system using 0.35-um CMOS technology and 3.3-V single power supply. The designed synthesizer consist of phase-frequency detector (PFD), charge pump, loop filter, voltage controlled oscillator (VCO), frequency divider, and sigma-delta modulator. A dead zone free PFD is used and a modified charge pump having active cascode transistors is used. A Multi-modulus prescaler having CML D flip-flop is used and VCO having a tuning range from 746 MHz to 2.632 GHz at 3.3 V power supply is used. Total power dissipation is 32 mW and phase noise is -118 dBc/Hz at 1 MHz offset.