Proceedings of the KIEE Conference (대한전기학회:학술대회논문집)
- 2003.11c
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- Pages.890-893
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- 2003
Design of CMOS Fractional-N Frequency Synthesizer for Bluetooth system
Bluetooth용 CMOS Fractional-N 주파수 합성기의 설계
- Published : 2003.11.21
Abstract
In this paper, we have designed the fractional-N frequency synthesizer for bluetooth system using 0.35-um CMOS technology and 3.3-V single power supply. The designed synthesizer consist of phase-frequency detector (PFD), charge pump, loop filter, voltage controlled oscillator (VCO), frequency divider, and sigma-delta modulator. A dead zone free PFD is used and a modified charge pump having active cascode transistors is used. A Multi-modulus prescaler having CML D flip-flop is used and VCO having a tuning range from 746 MHz to 2.632 GHz at 3.3 V power supply is used. Total power dissipation is 32 mW and phase noise is -118 dBc/Hz at 1 MHz offset.