• Convergence Security Journal
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• v.7 no.3
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• pp.7-13
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• 2007

Finite failure NHPP models presented in the literature exhibit either constant, monotonic increasing or monotonic decreasing failure occurrence rates per fault. Accurate predictions of software release times, and estimation of the reliability and availability of a software product require quantification of a critical element of the software testing process : test coverage. This model called Enhanced non-homogeneous poission process (ENHPP). In this paper, exponential coverage and S-shaped model was reviewed, proposes the superposition model, which maked out efficiency application for software reliability. Algorithm to estimate the parameters used to maximum likelihood estimator and bisection method, model selection based on SSE statistics for the sake of efficient model, was employed.

• Nuclear Engineering and Technology
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• v.41 no.6
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• pp.849-858
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• 2009

Risk caused by safety-critical instrumentation and control (I&C) systems considerably affects overall plant risk. As digitalization of safety-critical systems in nuclear power plants progresses, a risk model of a digitalized safety system is required and must be included in a plant safety model in order to assess this risk effect on the plant. Unique features of a digital system cause some challenges in risk modeling. This article aims at providing an overview of the issues related to the development of a static fault-tree-based risk model. We categorize the complicated issues of digital system probabilistic risk assessment (PRA) into four groups based on their characteristics: hardware module issues, software issues, system issues, and safety function issues. Quantification of the effect of these issues dominates the quality of a developed risk model. Recent research activities for addressing various issues, such as the modeling framework of a software-based system, the software failure probability and the fault coverage of a self monitoring mechanism, are discussed. Although these issues are interrelated and affect each other, the categorized and systematic approach suggested here will provide a proper insight for analyzing risk from a digital system.

• Journal of the Korean Institute of Telematics and Electronics
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• v.23 no.5
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• pp.666-673
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• 1986

This paper proposes a testable design method of PLA's with low overhead and high fault coverage for multiple faults. Only a shift register and control input of 2-bit decoder are used for extra hardware. By using a control input, the bit lines are controlled effectively. As the fault model, bridging faults and multiple faults of different fault models are particularly considered. 'Fault equivalence relation' and 'dominant faults' are defined to be used for detection of multiple faults. Also, an eadily testable folded PLA by this method is described.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.43 no.5
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• pp.449-455
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• 2015

Built-In-Test(hereafter: BIT) is necessary functionality for aircraft flight safety and it requires a high failure detection capacity of more than 95 % in the case of avionics equipment. The BIT coverage analysis is needed to make sure that BIT meets its fault diagnosis capability. FMECA is used a lot of for the BIT coverage analysis. However, in this paper, the BIT coverage analysis based on electronic components is introduced to minimize the analytical error. Further, by applying the failure mode of the electronic components and excluding electronic components that do not affect flight safety, the BIT coverage analysis can be more accurate. Finally, BIT demo was performed and it was confirmed that the performance of the actual BIT matches the analysis of BIT performance.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.32A no.12
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• pp.229-240
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• 1995

This paper proposes a new weighted random pattern testing technique to detect path delay faults in combinational logic circuits. When computing the probability of signal transition at primitive logic elements of CUT(Circuit Under Test) by the primary input, the proposed technique uses the information on the structure of CUT for initialization vectors and vectors generated by pseudo random pattern generator for test vectors. We can sensitize many paths by allocating a weight value on signal lines considering the difference of the levels of logic elements. We show that the proposed technique outperforms existing testing method in terms of test length and fault coverage using ISCAS '85 benchmark circuits. We also show that the proposed testing technique generates more robust test vectors for the longest and near-longest paths.

• Proceedings of the IEEK Conference
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• 2002.07c
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• pp.1972-1975
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• 2002

A new test approach based on a supply current test method is proposed for testing open faults in bipolar logic circuits. In the approach, only the open faults are detected by the supply current test method, which are difficult to be detected by functional test methods. The effectiveness of the approach is examined experimentally on open fault detection in TTL combinational circuits. The results shows that higher fault coverage can be established by applying a small number of test input vectors of the supply current test method after test vectors of functional test methods based on stuck-at models.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.30B no.4
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• pp.85-91
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• 1993

In this paper, we propose the test pattern generation algorithm of the embedded faulty MUX for the prevention of misdiagnosis of digital systems. When the system is partitioned with a large number of functional blocks, if the faults are exsisted in a embedded MUX then it can not diagnose the wanted observation of functional block. The proposed test pattern generstion algorithm can apply the MUXs that designd 2-level and multi-level both. Fault coverage becomes 100% and so it is no necessary of the additional fault simulation and the proposed algorithm that have the regulary and easily generated 2d test patterns. And we confirmed that the reduction of test cost becomes 85%, compared with the conventional segmentation testing scheme.

• Journal of the Optical Society of Korea
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• v.13 no.1
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• pp.98-106
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• 2009

This paper proposes an optical wireless transfer agent method which realizes the continuous and swift data transfer of optical wireless terminals in optical wireless networks. The unguided wireless channel generally shows frequent link disconnections and propagation delays due to weak wireless links. Specially speaking, optical wireless channels have more vulnerable links and roaming propagation delays relative to the weakness of the previous RF channels due to their low signal connectivity and small geographic coverage. Conventional optical wireless network protocols did not consider any fault models about physical link faults. Consequently, they have shown data transfer inefficiency for both data link control and physical wireless link control. To overcome these optical wireless environmental problems, this paper suggests a new wireless access point (or base station) agent system, which provides wireless or mobile clients with previous link layer protocols compensated.

• Journal of the Korean Institute of Telematics and Electronics
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• v.23 no.2
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• pp.197-205
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• 1986

In this paper, we present an efficient test algorithm for data processing function of MC68000 \ulcorner. The test vector for functional testing is determined by stuck-at, coupling and transition fault for data storage and transfer. But for data manipulation it is determined by a boolean function of micro-operation. This test algorithm is composed of 3 parts, choosing optimum test instructions for maximizing fault coverage and minimizing test process time, deciding the test order for minimizing test ambiguity, and processing the actual test.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.4
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• pp.74-84
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• 2003

Conventional test algorithms do not effectively detect faults by word-line and bit-line coupling noise resulting from the increase of the density of memories. In this paper, the possibility of faults caused by word-line coupling noise is shown, and new fault model, WLSFs(Word-Line Sensitive Fault) is proposed. We also introduce the algorithm considering both word-line and bit-line coupling noise simultaneously. The algorithm increases probability of faults which means improved fault coverage and more effective test algorithm, compared to conventional ones. The proposed algorithm can also cover conventional basic faults which are stuck-at faults, transition faults and coupling faults within a five-cell physical neighborhood.