• Title/Summary/Keyword: Fast Switching

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Analog MPPT Tracking MPP within One Switching Cycle for Photovoltaic Applications (One Switching Cycle 내에 최대전력점을 추종하는 태양광 발전의 아날로 MPPT 제어 시스템)

  • Ji, Sang-Keun;Kwon, Doo-Il;Yoo, Cheol-Hee;Han, Sang-Kyoo;Roh, Chung-Wook;Lee, Hyo-Bum;Hong, Sung-Soo
    • The Transactions of the Korean Institute of Power Electronics
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    • v.14 no.2
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    • pp.89-95
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    • 2009
  • Tracking the Maximum Power Point(MPP) of a photovoltaic(PV) array is usually an essential part of a PV system. The problem considered by MPPT techniques is to find the voltage $V_{MPP}$ or current $I_{MPP}$ at which a PV array should operate to generate the maximum power output PMPP under a given temperature and irradiance. The MPPT control methods, such as the perturb and observe method and the incremental conductance method require microprocessor or DSP to determine if the duty cycle should be increased or not. This paper proposes a simple and fast analog MPPT method. The proposed control scheme will track the MPP very fast and its hardware implementation is so simple, compared with the conventional techniques. The new algorithm has successfully tracked the MPP, even in case of rapidly changing atmospheric conditions, and Has higher efficiency than ordinary algorithms.

A Novel Fault Detection Method of Open-Fault in NPC Inverter System (NPC 인버터의 개방성 고장에 대한 새로운 고장 검출 방법)

  • Lee, Jae-Chul;Kim, Tae-Jin;Hyun, Dong-Seok
    • The Transactions of the Korean Institute of Power Electronics
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    • v.12 no.2
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    • pp.115-122
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    • 2007
  • In this paper, a novel fault detection method for fault tolerant control is proposed when the NPC inverter has a open failure in the switching device. The open fault of switching device is detected by checking the variation of a leg-voltage in the neutral-point-clamped inverter and the two phases control method is used for continuously balance the three phases voltage to the load. It can be achieve the fault tolerant control for improving the reliability of the NPC inverter by the fault detection and reconfiguration. This method has fast detection ability and a simple realization for fault detection, compared with a conventional method. Also, this fast detection ability improved the harmful effects such as DC-link voltage unbalance and overstress to other switching devices from a delay of fault detection. The proposed method has been verified by simulation and experiment.

A WLAN Pre-Authentication Scheme Based on Fast Channel Switching for 3G-WLAN Interworking (3G-WLAN Interworking 환경에서의 빠른 채널스위칭 기반의 무선랜 선인증 기법)

  • Baek, Jae-Jong;Kim, Hyo-Jin;Song, Joo-Seok
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.21 no.3
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    • pp.57-66
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    • 2011
  • The current trend of the handover authentication delay time is gradually increased according to the interworking between 3G cellular network and WLANs. Therefore, authentication mechanism minimized in delay is required to perform the seamless handover and support the inter-subnet and inter-domain handover. In this paper, we propose a novel pre-authentication scheme based on the fast channel switching which directly performs the authentication with the next access point in advance. In addition, the proposed scheme is efficient in the inter-domain handover and can be easily implemented in current WLANs since it just modifies the client side of user. To analysis and evaluate our scheme, we compare the packet loss ratio and the delay time with the two standard 802.11 authentication schemes. The analytical results show that our scheme is approximate 10 times more effective than the standard schemes in packet loss and the delay time is minimized down to 0.16 msec.

Zero-Current Switching Two-Transformer Phase-Shifted Full-Bridge Converter using Voltage Ripple (전압 리플을 이용해 영전류 스위칭하는 두 개의 트랜스포머를 가지는 위상천이 풀-브릿지 컨버터)

  • Han, Sang-Kyoo;Moon, Gun-Woo;Youn, Myung-Joong;Yoon, Hyun-Ki
    • The Transactions of the Korean Institute of Power Electronics
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    • v.11 no.1
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    • pp.14-21
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    • 2006
  • This paper presents a Zero-Current Switching(ZCS) two-transformer phase-shifted full-bridge(TTFB) converter using voltage ripple. The proposed converter provides Zero-Voltage Switching(ZVS) of leading leg switches and ZCS of lagging leg switches using voltage ripple. Especially, circulating current is reduced by ZCS operation and there are no additional components required for the soft switching of power switches. Furthermore, in case of light load, ZVS operation of lagging leg can be achieved. The operations, analysis and design consideration of proposed converter are presented. To verify the validity of the proposed converter, experimental results for a 410W (205[V], 2[A]) prototype are presented.

Spin-polarized Current Switching of Co/Cu/Py Pac-man type II Spin-valve

  • Lyle, Andrew;Hong, Yang-Ki;Choi, Byoung-Chul;Abo, Gavin;Bae, Seok;Jalli, Jeevan;Lee, Jae-Jin;Park, Mun-Hyoun;Syslo, Ryan
    • Journal of Magnetics
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    • v.15 no.3
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    • pp.103-107
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    • 2010
  • We investigated spin-polarized current switching of Pac-man type II (PM-II) nanoelements in Pac-man shaped nanoscale spin-valves (Co/Cu/Py) using micromagnetic simulations. The effects of slot angle and antiferromagnetic (AFM) layer were simulated to obtain optimum switching in less than 2 ns. At a critical slot angle of $105^{\circ}$, the lowest current density for anti-parallel to parallel (AP-P) switching was observed due to no vortex or antivortex formation during the magnetic reversal process. All other slot angles for AP-P formed a vortex or antivortex during the magnetization reversal process. Additionally, a vortex or anti-vortex formed for all slot angles for parallel to anti-parallel (P-AP) switching. The addition of an AFM layer caused the current density to decrease significantly for AP-P and P-AP at slot angles less than $90^{\circ}$. However, at slot angles greater than $90^{\circ}$, the current density tended to decrease by less amounts or actually increased slightly as shape anisotropy became more dominant. This allowed ultra-fast switching with 5.05 and $5.65{\times}10^8\;A/cm^2$ current densities for AP-P and P-AP, respectively, at a slot angle of $105^{\circ}$.

Study of the optical switching properties in waveguide type Au/$SiO_2$ nanocomposite film using prism coupler (프리즘 커플러를 이용한 도파로형 Au/$SiO_2$ 나노 혼합박막의 광 스위칭 특성 연구)

  • Cho, Sung-Hun;Lee, Soon-Il;Lee, Taek-Sung;Kim, Won-Mok;Lee, Kyeong-Seok
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.06a
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    • pp.76-76
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    • 2008
  • The resonance properties due to the surface plasmon(SP) excitation of metal nanoparticles make the nanocomposite films promising for various applications such as optical switching devices. In spite of the well-known ultra-sensitive operation of optical switches based on a guided wave, the application of nanocomposite film(NC) has inherent limitation originating from the excessive optical loss related with the surface plasmon resonance(SPR). In this study, we addressed this problem and present the experimental and theoretical analysis on the pump-probe optical switching in prism-coupled Au(1 vol.%):$SiO_2$ nanocomposite waveguide film. The guided mode was successfully generated using a near infrared probe beam of 1550 nm and modulated with an external pump beam of 532 nm close to the SPR wavelength. We extend our approach to ultra-fast operation using a pulsed laser with 5 ns pulse width. To improve the switching speed through the reduction in thermal loading effect accompanied by the resonant absorption of pump beam light, we adopted a metallic film as a coupling layer instead of low-index dielectric layer between the high-index SF10 prism and NC slab waveguide. We observed great enhancement in switching speed for the case of using metallic coupling layer, and founded a distinct difference in origin of optical nonlinearities induced during switching operation using cw and ns laser.

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Research Trends on Interface-type Resistive Switching Characteristics in Transition Metal Oxide (전이 금속 산화물 기반 Interface-type 저항 변화 특성 향상 연구 동향)

  • Dong-eun Kim;Geonwoo Kim;Hyung Nam Kim;Hyung-Ho Park
    • Journal of the Microelectronics and Packaging Society
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    • v.30 no.4
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    • pp.32-43
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    • 2023
  • Resistive Random Access Memory (RRAM), based on resistive switching characteristics, is emerging as a next-generation memory device capable of efficiently processing large amounts of data through its fast operation speed, simple device structure, and high-density implementation. Interface type resistive switching offer the advantage of low operation currents without the need for a forming process. Especially, for RRAM devices based on transition metal oxides, various studies are underway to enhance the memory characteristics, including precise material composition control and improving the reliability and stability of the device. In this paper, we introduce various methods, such as doping of heterogeneous elements, formation of multilayer films, chemical composition adjustment, and surface treatment to prevent degradation of interface type resistive switching properties and enhance the device characteristics. Through these approaches, we propose the feasibility of implementing high-efficient next-generation non-volatile memory devices based on improved resistive switching properties.

Experimental and Analytical Studies on the Characteristics of Fast Switch in Combinations of Various Superconducting Tapes (다양한 선재 조합에 따른 이종 초전도 스위치의 특성 실험 및 분석)

  • Lee, Ji-Ho;Kim, Young-Jae;Na, Jin-Bae;Choi, Suk-Jin;Jang, Jae-Young;Hwang, Young-Jin;Kim, Jin-Sub;Ko, Tae-Kuk
    • Progress in Superconductivity and Cryogenics
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    • v.13 no.1
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    • pp.31-35
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    • 2011
  • A Hybrid Fault Current Limiter(FCL) which has more advantages in fast response and thermal characteristics than a simple resistive FCL had been proposed by our group. The Hybrid FCL consists of a resistive FCL for the magnitude of the first peak of fault current, and a fast switch for detecting fault current and generating the repulsive force within a cycle in fault situation. In ideal case, the impedance of the fast switch wound with two other kinds of HTS tape is negligibly zero in normal operation. But, during the fault situation, each HTS tape has different quench characteristics because of asymmetric current distribution. And this phenomenon causes effective flux and this flux opens the switch through the repulsive force applied to a metal plate of the fast switch. The magnitude of the repulsive force affects the switching characteristics of the fast switch. It should be large enough to raise the metal plate up. Otherwise the arc re-out break which are caused by not enough repulsive force to raise the metal plate up can cause unintended operation of the fast switch. In this paper, the numerical calculation of the repulsive force applied to the metal plate of the fast switch in various combinations of HTS tapes was performed by using the short-circuit test and finite element method.

Effects of Electrostatic Discharge Stress on Current-Voltage and Reverse Recovery Time of Fast Power Diode

  • Bouangeune, Daoheung;Choi, Sang-Sik;Cho, Deok-Ho;Shim, Kyu-Hwan;Chang, Sung-Yong;Leem, See-Jong;Choi, Chel-Jong
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.14 no.4
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    • pp.495-502
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    • 2014
  • Fast recovery diodes (FRDs) were developed using the $p^{{+}{+}}/n^-/n^{{+}{+}}$ epitaxial layers grown by low temperature epitaxy technology. We investigated the effect of electrostatic discharge (ESD) stresses on their electrical and switching properties using current-voltage (I-V) and reverse recovery time analyses. The FRDs presented a high breakdown voltage, >450 V, and a low reverse leakage current, < $10^{-9}$ A. From the temperature dependence of thermal activation energy, the reverse leakage current was dominated by thermal generation-recombination and diffusion, respectively, at low and high temperature regions. By virtue of the abrupt junction and the Pt drive-in for the controlling of carrier lifetime, the soft reverse recovery behavior could be obtained along with a well-controlled reverse recovery time of 21.12 ns. The FRDs exhibited excellent ESD robustness with negligible degradations in the I-V and the reverse recovery characteristics up to ${\pm}5.5$ kV of HBM and ${\pm}3.5$ kV of IEC61000-4-2 shocks. Likewise, transmission line pulse (TLP) analysis reveals that the FRDs can handle the maximum peak pulse current, $I_{pp,max}$, up to 30 A in the forward mode and down to - 24 A in the reverse mode. The robust ESD property can improve the long term reliability of various power applications such as automobile and switching mode power supply.

A Possible Path per Link CBR Algorithm for Interference Avoidance in MPLS Networks

  • Sa-Ngiamsak, Wisitsak;Varakulsiripunth, Ruttikorn
    • 제어로봇시스템학회:학술대회논문집
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    • 2004.08a
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    • pp.772-776
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    • 2004
  • This paper proposes an interference avoidance approach for Constraint-Based Routing (CBR) algorithm in the Multi-Protocol Label Switching (MPLS) network. The MPLS network itself has a capability of integrating among any layer-3 protocols and any layer-2 protocols of the OSI model. It is based on the label switching technology, which is fast and flexible switching technique using pre-defined Label Switching Paths (LSPs). The MPLS network is a solution for the Traffic Engineering(TE), Quality of Service (QoS), Virtual Private Network (VPN), and Constraint-Based Routing (CBR) issues. According to the MPLS CBR, routing performance requirements are capability for on-line routing, high network throughput, high network utilization, high network scalability, fast rerouting performance, low percentage of call-setup request blocking, and low calculation complexity. There are many previously proposed algorithms such as minimum hop (MH) algorithm, widest shortest path (WSP) algorithm, and minimum interference routing algorithm (MIRA). The MIRA algorithm is currently seemed to be the best solution for the MPLS routing problem in case of selecting a path with minimum interference level. It achieves lower call-setup request blocking, lower interference level, higher network utilization and higher network throughput. However, it suffers from routing calculation complexity which makes it difficult to real task implementation. In this paper, there are three objectives for routing algorithm design, which are minimizing interference levels with other source-destination node pairs, minimizing resource usage by selecting a minimum hop path first, and reducing calculation complexity. The proposed CBR algorithm is based on power factor calculation of total amount of possible path per link and the residual bandwidth in the network. A path with high power factor should be considered as minimum interference path and should be selected for path setup. With the proposed algorithm, all of the three objectives are attained and the approach of selection of a high power factor path could minimize interference level among all source-destination node pairs. The approach of selection of a shortest path from many equal power factor paths approach could minimize the usage of network resource. Then the network has higher resource reservation for future call-setup request. Moreover, the calculation of possible path per link (or interference level indicator) is run only whenever the network topology has been changed. Hence, this approach could reduce routing calculation complexity. The simulation results show that the proposed algorithm has good performance over high network utilization, low call-setup blocking percentage and low routing computation complexity.

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