• Journal of Sensor Science and Technology
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• v.6 no.3
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• pp.221-227
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• 1997

The Pd/NiCr gate MISFET-type sensors were fabricated for detecting hydrogen dissolved in high-capacivity transformer oil. To improve stability and high concentration sensitivity of the sensor, Pd/NiCr double catalysis metal gate was used. To reduce the serious gate voltage drift of the sensor induced by hydrogen, the gate insulators of 2 FETs were constructed with double layer of silicon dioxide and silicon nitride. The hydrogen sensitivity of the Pd/NiCr gate MISFET is about a half of Pd/Pt gate MISFET's sensitivity but the Pd/NiCr gate MISFET has good stability and high concentration detectivity up to 1000 ppm.

• JSTS:Journal of Semiconductor Technology and Science
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• v.8 no.2
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• pp.156-163
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• 2008

We proposed a new $p^+/n^+$ gate locally-separated-channel (LSC) bulk FinFET which has vertically formed oxide region in the center of fin body, and device characteristics were optimized and compared with that of normal channel (NC) FinFET. Key device characteristics were investigated by changing length of $n^+$ poly-Si gate ($L_s$), the material filling the trench, and the width and length of the trench at a given gate length ($L_g$). Using 3-dimensional simulations, we confirmed that short-channel effects were properly suppressed although the fin width was the same as that of NC device. The LSC device having the trench non-overlapped with the source/drain diffusion region showed excellent $I_{off}$ suitable for sub-50 nm DRAM cell transistors. Design of the LSC devices were performed to get reasonable $L_s/L_g$ and channel fin width ($W_{cfin}$) at given $L_gs$ of 30 nm, 40 nm, and 50 nm.

• ETRI Journal
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• v.36 no.1
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• pp.89-98
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• 2014

The integration of digital circuits has a tight relation with the scaling down of silicon technology. The continuous scaling down of the feature size of CMOS devices enters the nanoscale, which results in such destructive effects as short channel effects. Consequently, efforts to replace silicon technology with efficient substitutes have been made. The carbon nanotube field-effect transistor (CNTFET) is one of the most promising replacements for this purpose because of its essential characteristics. Various digital CNTFET-based circuits, such as standard logic cells, have been designed and the results demonstrate improvements in the delay and energy consumption of these circuits. In this paper, a new CNTFET-based 5-input XOR gate based on a novel design method is proposed and simulated using the HSPICE tool based on the compact SPICE model for the CNTFET at the 32-nm technology node. The proposed method leads to improvements in performance and device count compared to the conventional CMOS-style design.

• Journal of Power Electronics
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• v.11 no.2
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• pp.188-193
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• 2011

A highly efficient AC-DC converter for small wind power generation systems using a brushless DC generator (BLDCG) is presented in this paper. The market standard AC-DC converter for a BLDCG consists of a three-phase diode rectifier and a boost DC-DC converter, which has an IGBT and a fast recovery diode (FRD). This kind of two-stage solution basically suffers from a large amount of conduction loss and the efficiency greatly decreases under a light load, or at a low current, because of the switching devices with a P-N junction. In order to overcome this low efficiency, especially at a low current, a three-phase bridgcless converter consisting of three upper side FRDs and three lower side Super Junction FETs is presented. In the overall operating speed region, including the cut-in speed, the efficiency of the proposed converter is improved by up to 99%. Such a remarkable result is validated and compared with conventional solutions by calculating the power loss based on I-V curves and the switching loss data of the adopted commercial switches and the current waveforms obtained through PSIM simulations.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.31 no.3
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• pp.135-140
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• 2018

Atomically thin $MoS_2$ single crystals have a two-dimensional structure and exhibit semiconductor properties, and have therefore recently been utilized in electronic devices and circuits. In this study, we have fabricated a field effect transistor (FET), using a CVD-grown, 3 nm-thin, $MoS_2$ single-crystal as a transistor channel after transfer onto a $SiO_2/Si$ substrate. The $MoS_2$ FETs displayed n-channel characteristics with an electron mobility of $0.05cm^2/V-sec$, and a current on/off ratio of $I_{ON}/I_{OFF}{\simeq}5{\times}10^4$. Application of bottom-gate voltage stresses, however, increased the interface charges on $MoS_2/SiO_2$, incurred the threshold voltage change, and degraded the device performance in further measurements. Exposure of the channel to UV radiation further degraded the device properties.

• Transactions on Electrical and Electronic Materials
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• v.14 no.3
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• pp.148-151
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• 2013

The control of Ga doping in ZnO nanowires (NWs) by physical vapor deposition has been implemented and characterized. Various Ga-doped ZnO NWs were grown using the vapor-liquid-solid (VLS) method, with Au catalyst on c-plane sapphire substrate by hot-walled pulsed laser deposition (HW-PLD), one of the physical vapor deposition methods. The structural, optical and electrical properties of Ga-doped ZnO NWs have been systematically analyzed, by changing Ga concentration in ZnO NWs. We observed stacking faults and different crystalline directions caused by increasing Ga concentration in ZnO NWs, using SEM and HR-TEM. A $D^0X$ peak in the PL spectra of Ga doped ZnO NWs that is sharper than that of pure ZnO NWs has been clearly observed, which indicated the substitution of Ga for Zn. The electrical properties of controlled Ga-doped ZnO NWs have been measured, and show that the conductance of ZnO NWs increased up to 3 wt% Ga doping. However, the conductance of 5 wt% Ga doped ZnO NWs decreased, because the mean free path was decreased, according to the increase of carrier concentration. This control of the structural, optical and electrical properties of ZnO NWs by doping, could provide the possibility of the fabrication of various nanowire based electronic devices, such as nano-FETs, nano-inverters, nano-logic circuits and customized nano-sensors.

• Journal of Sensor Science and Technology
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• v.23 no.5
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• pp.314-319
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• 2014

Here, we review the various methods for the preparation of vanadium dioxide ($VO_2$) films and nanowires, and their potential applications to the sensors such as gas sensor, strain sensor, and temperature sensor. $VO_2$ is an interesting material on account of its easily accessible and sharp Mott metal-insulator transition (MIT) at ${\sim}68^{\circ}C$ in the bulk. The MIT is also triggered by the electric field, stress, magnetic field etc. This paper involves exceptionally sensitive hydrogen sensors based on the catalytic process between hydrogen molecules and Pd nanoparticles on the $VO_2$ surface, and fast responsive sensors based on the self-heating effects which leads to the phase changes of the $VO_2$. These features will be seen in this paper and can enable strategies for the integration of a $VO_2$ material in advanced and complex functional units such as logic gates, memory, FETs for micro/nano-systems as well as the sensors.

• Journal of the Korean Applied Science and Technology
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• v.27 no.1
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• pp.44-49
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• 2010

본 논문에서는 6,13-bis (triisopropylsily lethynyl)-pentacene (TIPS-pentacene) 유기 박막 트랜지스터에 니켈 버퍼층을 적층했을 때의 효과를 연구하였다. 니켈 (Nickel) / 은(Silver) 소스 드레인 전극은 은 (Silver) 전극이 단독으로 쓰일 때 보다 에너지 레벨차이를 줄여 캐리어의 주입이 더 잘되도록 도와주므로써 전기적 특성을 향상 시켜준다. 또한 유기 게이트 절연체의 추가로 TIPS-pentacene 은 규칙적 배열된 형태를 가지므로써 소자 성능의 향상을 가지고 온다. 제작한 유기박막트랜지스터 에서 $0.01\;cm^2$의 포화영역 이동도를 얻을 수 있었으며, 또한 드레인 전압을 50 V로 하고 게이트 전압을 20 V에서 -50 V 까지 인가하였을 때 $2{\times}10^4$의 전멸 비를 얻을 수 있었다. 이러한 결과를 polyethylene terephthalate (PET) 기판을 이용한 유연한 OTFTs 에 적용시켜본 결과 유리기판위에 제작했을 때와 비슷한 성능을 얻음을 확인하였다.

• 한국정보디스플레이학회:학술대회논문집
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• 2003.07a
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• pp.675-678
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• 2003

We studied the electrical characteristics of pentacene-based organic field-effect transistors (FETs) with polymethyl methacrylate (PMMA) or poly-4-vinylphenol (PVP) as the gate insulator. PMMA or PVP was spin-coated on the indium tin oxide glass substrate that serves as gate electrodes. The source-drain current dependence on the gate voltage shows the FET characteristics of the hole accumulation type. The transistor with PVP shows a higher field-effect mobility of 0.14 $cm^{2}/Vs$ compared with 0.045 $cm^{2}/Vs$ for the transistor with PMMA. The atomic force microscope (AFM) images indicate that the grain size of the pentacene on PVP is larger than that on PMMA. X-ray diffraction (XRD) patterns for the pentacene deposited on PVP exhibit a new Bragg reflection at $19.5{\pm}0.2^{\circ}$, which is absent for the pentacene on PMMA. This peak corresponds to the flat-lying pentacene molecules with less intermolecular spacing.

• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.5
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• pp.554-562
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• 2015

This paper presents the design and analysis of gate-recessed AlGaN/GaN Fin-type Field-Effect Transistor (FinFET). The three-dimensional (3-D) technology computer-aided design (TCAD) simulations were performed to analyze the direct-current (DC) and radio-frequency (RF) characteristics for AlGaN/GaN FinFETs. The fin width ($W_{fin}$) and the height of GaN layer ($H_{GaN}$) are the design parameters used to improve the electrical performances of gate-recessed AlGaN/GaN FinFET.