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The Change of I-V Characteristics by Gate Voltage Stress on Few Atomic Layered MoS2 Field Effect Transistors

수 원자층 두께의 MoS2 채널을 가진 전계효과 트랜지스터의 게이트 전압 스트레스에 의한 I-V 특성 변화

  • 이형규 (충북대학교 전자정보대학 전자공학부) ;
  • 이기성 (나노종합기술원)
  • Received : 2017.11.22
  • Accepted : 2018.01.05
  • Published : 2018.03.01

Abstract

Atomically thin $MoS_2$ single crystals have a two-dimensional structure and exhibit semiconductor properties, and have therefore recently been utilized in electronic devices and circuits. In this study, we have fabricated a field effect transistor (FET), using a CVD-grown, 3 nm-thin, $MoS_2$ single-crystal as a transistor channel after transfer onto a $SiO_2/Si$ substrate. The $MoS_2$ FETs displayed n-channel characteristics with an electron mobility of $0.05cm^2/V-sec$, and a current on/off ratio of $I_{ON}/I_{OFF}{\simeq}5{\times}10^4$. Application of bottom-gate voltage stresses, however, increased the interface charges on $MoS_2/SiO_2$, incurred the threshold voltage change, and degraded the device performance in further measurements. Exposure of the channel to UV radiation further degraded the device properties.

Keywords

References

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