• Title/Summary/Keyword: FETs

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Current Status and Prospects of FET-type Ferroelectric Memories

  • Ishiwara, Hiroshi
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.1 no.1
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    • pp.1-14
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    • 2001
  • Current status and prospects of FET-type FeRAMs (ferroelectric random access memories) are reviewed. First, it is described that the most important issue for realizing FET-type FeRAMs is to improve the data retention characteristics of ferroelectric-gate FETs. Then, necessary conditions to prolong the retention time are discussed from viewpoints of materials, device structure, and circuit configuration. Finally, recent experimental results related to the FET-type memories are introduced, which include optimization of a buffer layer that is inserted between the ferroelectric film and a Si substrate, development of a new ferroelectric film with a small remnant polarization value, proposal and fabrication of a 1T2C-type memory cell with good retention characteristics, and so on.

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Effects of Rapid Thermal Annealing Temperature on Performances of Nanoscale FinFETs

  • Sengupta, M.;Chattopadhyay, S.;Maiti, C.K.
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.9 no.4
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    • pp.266-272
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    • 2009
  • In the present work three dimensional process and device simulations were employed to study the performance variations with RTA. It is observed that with the increase in RTA temperature, the arsenic dopants from the source /drain region diffuse laterally under the spacer region and simultaneously acceptors (Boron) are redistributed from the central axis region of the fin towards the Si/SiO2 interface. As a consequence both drive current and peak cut-off frequency of an n-FinFET are observed to improve with RTA temperatures. Volume inversion and hence the flow of carries through the central axis region of the fin due to reduced scattering was found behind the performance improvements with increasing RTA temperature.

3D TCAD Analysis of Hot-Carrier Degradation Mechanisms in 10 nm Node Input/Output Bulk FinFETs

  • Son, Dokyun;Jeon, Sangbin;Kang, Myounggon;Shin, Hyungcheol
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.16 no.2
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    • pp.191-197
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    • 2016
  • In this paper, we investigated the hotcarrier injection (HCI) mechanism, one of the most important reliability issues, in 10 nm node Input/Output (I/O) bulk FinFET. The FinFET has much intensive HCI damage in Fin-bottom region, while the HCI damage for planar device has relatively uniform behavior. The local damage behavior in the FinFET is due to the geometrical characteristics. Also, the HCI is significantly affected by doping profile, which could change the worst HCI bias condition. This work suggested comprehensive understanding of HCI mechanisms and the guideline of doping profile in 10 nm node I/O bulk FinFET.

Low-Power Fully Digital Voltage Sensor using 32-nm FinFETs

  • Nguyen, H.V.;Kim, Youngmin
    • IEIE Transactions on Smart Processing and Computing
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    • v.5 no.1
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    • pp.10-16
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    • 2016
  • In this paper, a design for a fully digital voltage sensor using a 32-nm fin-type field-effect transistor (FinFET) is presented. A new characteristic of the double gate p-type FinFET (p-FinFET) is examined and proven appropriate for sensing voltage variations. On the basis of this characteristic, a novel technique for designing low-power voltage-to-time converters is presented. Then, we develop a digital voltage sensor with a voltage range of 0.7 to 1.1V at a 50-mV resolution. The performance of the proposed sensor is evaluated under a range of voltages and process variations using Simulation Program with Integrated Circuit Emphasis (SPICE) simulations, and the sensor is proven capable of operating under ultra-low power consumption, high linearity, and fairly high-frequency conditions (i.e., 100 MHz).

High-Performance Silicon-on-Insulator Based Dual-Gate Ion-Sensitive Field Effect Transistor with Flexible Polyimide Substrate-based Extended Gate (유연한 폴리이미드 기판 위에 구현된 확장형 게이트를 갖는 Silicon-on-Insulator 기반 고성능 이중게이트 이온 감지 전계 효과 트랜지스터)

  • Lim, Cheol-Min;Cho, Won-Ju
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.28 no.11
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    • pp.698-703
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    • 2015
  • In this study, we fabricated the dual gate (DG) ion-sensitive field-effect-transistor (ISFET) with flexible polyimide (PI) extended gate (EG). The DG ISFETs significantly enhanced the sensitivity of pH in electrolytes from 60 mV/pH to 1152.17 mV/pH and effectively improved the drift and hysteresis phenomenon. This is attributed to the capacitive coupling effect between top gate and bottom gate insulators of the channel in silicon-on-transistor (SOI) metal-oxide-semiconductor (MOS) FETs. Accordingly, it is expected that the PI-EG based DG-ISFETs is promising technology for high-performance flexible biosensor applications.

2D-Simulation of Quantum Effects in Silicon Nanowire Transistor (실리콘 나노선 트렌지스터 양자 효과의 2차원 시뮬레이션)

  • Hwang, Min-Young;Choi, Chang-Yong;Koo, Sang-Mo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2009.06a
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    • pp.132-132
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    • 2009
  • A 2D-simulation using a quantum model of silicon nanowire (SiNW) field-effect transistors (FETs) have been performed by the effective mass theory. We have investigated very close for real device analysis, so we used to the non-equilibrium Green's function (NEGF) and the density gradient of quantum model. We investigated I-V characteristics curve and C-V characteristics curve of the channel thickness from 5nm to 200nm. As a result of simulation, even higher drain current in SiNW using a quantum model was observed than in SiNW using a non-quantum model. The reason of higher drain current can be explained by the quantum confinement effect.

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무전해 식각법으로 합성된 Si 나노와이어를 이용한 CMOS 인버터

  • Mun, Gyeong-Ju;Lee, Tae-Il;Lee, Sang-Hun;Hwang, Seong-Hwan;Myeong, Jae-Min
    • Proceedings of the Materials Research Society of Korea Conference
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    • 2011.10a
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    • pp.22.2-22.2
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    • 2011
  • Si 나노와이어를 합성하는 다양한 방법들 중에서 Si 기판을 나노와이어 형태로 제작하는 무전해 식각법은 쉽고 간단하기 때문에 최근 많은 연구가 진행되고 있다. 무전해 식각법을 이용한 Si 나노와이어는 p 또는 n형의 전기적 특성을 갖는 Si 기판의 도핑농도에 따라 원하는 전기적 특성을 갖는 나노와이어를 얻을 수 있을 것이라는 기대가 있었지만 n형으로 제작된 나노와이어의 경우 식각에 의한 표면의 거칠기 때문에 그 특성을 나타내지 못하는 문제점을 가지고 있다. 본 연구에서는 무전해 식각법을 이용하여 p와 n형 나노와이어를 합성하고 field-effect transistors (FETs) 소자를 제작하여 각각의 특성을 구현하였다. 나노와이어와 절연막 사이의 계면 결함을 최소화하기 위하여 poly-4-vinylphenol (PVP) 고분자 절연막에 나노와이어를 삽입시킨 형태로 소자를 제작하였고, 특히 n형 나노와이어의 표면을 보다 평평하게 하기 위하여 열처리를 진행 하였다. 이렇게 각각의 특성이 구현된 나노와이어를 이용하여 soft-lithography 공정을 통해 complementary metal-oxide semiconductor (CMOS) 구조의 인버터 소자를 제작하였으며 그 전기적 특성을 평가하였다.

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Focused Electron Beam-Controlled Graphene Field-Effect Transistor

  • Kim, Songkil
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.33 no.5
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    • pp.360-366
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    • 2020
  • Focused electron beams with high energy acceleration are versatile probes. Focused electron beams can be used for high-resolution imaging and multi-mode nanofabrication, in combination with, molecular precursor delivery, in an electron microscopy environment. A high degree of control with atomic-to-microscale resolution, a focused electron beam allows for precise engineering of a graphene-based field-effect transistor (FET). In this study, the effect of electron irradiation on a graphene FET was systematically investigated. A separate evaluation of the electron beam induced transport properties at the graphene channel and the graphene-metal contacts was conducted. This provided on-demand strategies for tuning transfer characteristics of graphene FETs by focused electron beam irradiation.

Radiation Hardness Evaluation of GaN-based Transistors by Particle-beam Irradiation (방사선빔 조사를 이용한 질화갈륨 기반 트랜지스터의 내방사선 특성 연구)

  • Keum, Dongmin;Kim, Hyungtak
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.66 no.9
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    • pp.1351-1358
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    • 2017
  • In this work, we investigated radiation hardness of GaN-based transistors which are strong candidates for next-generation power electronics. Field effect transistors with three types of gate structures including metal Schottky gate, recessed gate, and p-AlGaN layer gate were fabricated on AlGaN/GaN heterostructure on Si substrate. The devices were irradiated with energetic protons and alpha-particles. The irradiated transistors exhibited the reduction of on-current and the shift of threshold voltage which were attributed to displacement damage by incident energetic particles at high fluence. However, FET operation was still maintained and leakage characteristics were not degraded, suggesting that GaN-based FETs possess high potential for radiation-hardened electronics.

Study of Electron Injection of Pentacene Field Effect Transistor with Au Electrodes by C-V and SHG Measurements

  • Lim, Eun-Ju;Manaka, Takaaki;Tamura, Ryosuke;Ohshima, Yuki;Iwamoto, Mitsumasa
    • Transactions on Electrical and Electronic Materials
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    • v.9 no.4
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    • pp.151-155
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    • 2008
  • Using pentacene field effect transistors (FETs) with Au source and drain electrodes, electron injection from the Au electrodes into the pentacene was investigated. The capacitance-voltage (C-V) and optical second harmonic generation (SHG) measurements were employed. Electron injection from the Au electrodes was suggested by the hysteresis behavior with the C-V characteristics and slowly decaying SHG signal under DC biasing, A mechanism of hole-injection assisted by trapped electrons is proposed. To confirm electron injection process, light-emitting behavior under the application of AC applied voltage was observed.